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Home  > ADVANCED PACKAGING: 3D IC, WLP & TSV
  > Advanced Packaging: 3D IC, WLP & TSV
 
  >  TOP STORY
Ziptronix Pioneering 3D Integrated Circuit Process Technology
Ziptronix was clearly one of the first companies addressing the technology needs of the developing 3D IC marketplace. CEO Daniel Donabedian  indicates that  the company was ahead of its time when it comes to 3D processing "We were just to early” he said. “However, now things appear to be catching fire, we believe we have the reliable, low COO ...
 
 
  >  ANALYSIS
Silicon Interposers Wait for an Application
To begin with a little background, what is a silicon interposer? “Taking an abstract position, that of a designer view of electronics, electronic systems consists of a very large number of active and passive components that are connected through a complex interconnect system that is hierarchically organized,” explains Eric Beyne, program director of the ...
 
 
  >  INTERVIEW
Generic 3-D platform technologies for IC integrated MEMS at KTH-MST
The Microsystem Technology Lab is a part of the School of Electrical Engineering at KTH-Royal Institute of Technology, located in Stockholm, Sweden. The MST group is headed by Prof. Göran Stemme and has more than 25 staff members, researchers and Ph.D. students. The research at KTH-MST is centered around MEMS and its applications, with a focus on applied, silicon-based sensor and actuator ...
 
 
  >  PRESENTATION
TSV+: Cost model tool for your 3D TSV manufacturing analysis
Stacking chips in 3D with TSV (Through Silicon Vias) is a new breakthrough packaging technology platform for 3D integration of ICs, logic, RF-SiP, CMOS image sensors and MEMS. However, cost of the technology is still a major hurdle today as TSVs are competing against low cost interconnect technologies such as ...
 
 
  >  LATEST REPORT
3D-TSV Interconnects - 2008 Report
The Semiconductor manufacturing industry is today facing more than ever the challenge to explore the so-called “More-than-Moore” 3-D integration route in order to pursue the aggressive scaling of the historical Moore’s Law. The whole Semiconductor industry supply chain is being concerned: from IDMs to Fabless and CMOS foundries, from OSATs to Substrate and Circuit Assembly players as well....
 
 
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 July 2008

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  >  NEWS
August 27th 2008
Aviza Technology today announced orderd for its 300 mm Omega deep silicon (DSi) etch ...

August 19th 2008
Sony Semiconductor Kyushu disclosed some details about a new PiP architecture during a ...

August 11th 2008
One of Chipworks engineers actually worked on a TSV project over 11 years ago but the ...

August 11th 2008
Semiconductor giants ST and Infineon have joined forces with 3D packaging provider ...

July 29th 2008
Vertical Circuits (VCI) announced the signing of a strategic manufacturing agreement ...

July 28th 2008
According to a recent article from Fabtech magazine, a major Korean memory manufacturer...

July 24th 2008
According to Digitimes, Taiwan's Industrial Technology Research Institute (ITRI) ...

July 22nd 2008
Vertical Circuits, Inc.(VCI), announced its recognition of Asymtek, a Nordson company, ...

July 16th 2008
STMicro is preparing for BSI CMOS image sensor to meet consumer demand for ...

July 14th 2008
Qualcomm annouced the company has become the first fabless chip maker to participate in...

July 9th 2008
July 8 - EV Group (EVG), a leading supplier of wafer-bonding and lithography equipment ...

July 8th 2008
July 8 - SUSS MicroTec announced today that it has shipped and successfully installed a...

July 7th 2008
WLP (Wafer level packaging) for image sensor devices has the advantage of small size, ...

July 7th 2008
According to a recent report from Digitimes, XinTec has turned conservative about its ...


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