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Home  > ADVANCED PACKAGING: 3D IC, WLP & TSV
  > Advanced Packaging: 3D IC, WLP & TSV
 
  >  TOP STORY
At IEEE International Electron Devices Meeting, IMEC presented a monolithically integrated 11 megapixel micro-mirror array for high-end industrial applications, a world’s first both in terms of pixel density and reliability. Each mirror in the array is 8μm x 8μm and can be individually tilted by the high-speed integrated CMOS circuitry underneath the array. This device fits in IMEC’s ...

 
  >  ANALYSIS
One of the primary motivating factors behind using through-silicon vias (TSVs) and 3-D chip stacking technologies is the desire to reduce electrical latency. As line size is reduced, the capacitive resistance increases, placing a “drag” on the electrical signals that are transported around the chip. At a certain size, speed improvements stop. The solution? Shorten the signals transmitted across ...

 
  >  INTERVIEW
Nemotek was established in September 2007 as a subsidiary of MEDZ as a Government initiative to position Morocco as a key player within the microelectronics industry and new sciences arena. Nemotek is located in Rabat Technopolis Park, a hub of technology development that includes an integrated, world-class campus and R&D «Go-to-Market» centre. Being in close proximity to such institutions ...
 

 
  >  REVERSE ENGINEERING
Chipworks Inc., a leading reverse engineering company and Yole Developpement, a market research structure specialized in the advanced packaging industry analysis announce they have combined their efforts and in-house expertise to release an exclusive joined report on Toshiba’s latest CMOS image sensor featuring TSV ‘Through Silicon Vias’ interconnects. The new report features three different ...
 

 
  >  PRESENTATION
To discover about challenges & markets for the 3-D integration of MEMS sensors and other related devices, please download Jean Christophe Eloy’s latest presentation held on Advanced Packaging Webcast on September 2008 ... ...

 
  >  LATEST REPORT
This exclusive report, jointly published by Chipworks and Yole Developpement, analyzes the technology and economics behind toshiba’s latest Dynastron CMOS Image sensor. Leveraging downstream product teardowns and semiconductor reverse engineering this report provides evidence-based analysis on the technical achievements and cost of the device....

 
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  >  NEWSLETTERS
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  >  NEWS
The agreement will focus on the evaluation of photoresists and supporting ...

As a result of these successful tests, DALSA intends to license Alchimer’s technology ...

All models integrate a charge pump with automatic voltage multiplier switching (x1, x1....

An important focus of this consortium is to explore and demonstrate ultra-high density,...

Players from Microelectronic and Packaging industries are cordially invited to submit a...

Rudolph Technologies announced the successful installation of an
EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the ...

Silex, based in Järfälla, Sweden, has selected Applied’s products for its new 8”fab, ...

Samsung claimed to have realized the SSD with the highest overall performance in the ...

Over the last decade, the amount of information to be processed in image-capture ...

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the ...

November 14th 2008
Chipworks Inc., a leading reverse engineering company and Yole Developpement, a market ...

The market continues to demand smaller form factor packages with enhanced reliability ...

The tool has been shipped to a leading supplier of substrates and services in the ...

Replisaurus has secured significant financing that puts the company in a strong ...


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