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Status of Panel-Level Packaging & Manufacturing
Nov.2015

overview_of_equipment_vendors_offering_tools_for_panel_packaging_yole_report
5 990 €

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Description

couv flyer statuts panel

Business is there for the taking! Now, how to design the ideal supply chain to support high-volume manufacturing?

Which applications will drive panel platforms?

For more than four decades, the semiconductor industry has rigorously followed Moore’s Law in scaling down CMOS technologies. However, a huge investment in new lithography solutions is required to achieve advanced nodes in a range of 20 nm. Although some packaging platforms processed on wafer, i.e. SI interposer, exhibit good performance, high cost is still the main obstacle that limits its adoption for high-volume manufacturing.

The demand for lower cost with higher performance has driven the semiconductor industry to develop innovative solutions. One new approach to reducing overall cost is to switch from wafer to a larger-size panel format. Indeed, the panel infrastructure has attracted considerable interest from the semiconductor industry and is certainly a promising market due to its cost advantages and economy of scale benefits. Panel-level manufacturing has the potential to leverage the knowledge and infrastructure of wafer-level packaging (WLP) and the PCB/Flat-Panel Display/Photovoltaic industries.

Panel’s application scope could be segmented into three different categories defined by the required resolution. Different applications could be part of panel’s success story. High-end products like networks, CPU/GPU, FPGA, and servers will necessitate a resolution reduced to 2 µm. Therefore, this area is likely to be dominated by 300mm lines where the front-end is already well-established and has the L/S capability to achieve such resolution.

Midrange products including basebands, processors, power management modules, and RFIC should be the main target of FO WLP based on panel and glass panel interposers, while organic interposers should be restricted to low-end products: mobile, consumer, WiFi, and power management.

We estimate that the panel packaging industry will reach $109M by 2017, with a market value of $405M by 2020.

This report provides an in-depth analysis of the panel industry and its future development/drivers, covering platforms such as FO WLP panel, embedded die, organic interposer, glass panel interposer and hybrid interposer.

Revenue forecast for panel level packaging Yole report 

Panel manufacturing infrastructure status: the HVM roadmap has yet to be built

We’ve identified five key packaging platforms that can be processed on a larger surface (rectangular/square): FO WLP panel, organic interposer, glass panel interposer, hybrid interposer and embedded die. Over the past few years, it’s become clear that some panel package choices will be more suitable than others for successful commercial development. The key questions are when will the panel industry take off, and how will it evolve?

Some of these advanced packaging platforms (embedded die and organic interposer) are already available on panel, while others like FO WLP and glass interposer have yet to be confirmed.

Embedded die-in-substrate is a promising packaging technology whose key benefits are small form factor and size, high integration capability, and good thermal/electrical performance. However, despite these benefits and the multiple players working on this technology, it hasn’t really taken off in terms of high-volume manufacturing. Presently, only a few players (TDK, AT&S, and Taiyo-Yuden) are in volume production.

Certain factors have impeded embedded die technology’s growth due to the lack of driving applications and standardization which make it difficult for end-customers to multisource. These challenges are gradually being addressed, and we believe that things are starting to happen which will propel this technology onto a high growth path.

With TDK and ASE establishing their “ASE Embedding Electronics” joint venture in 2015 (in which products based on TDK’s SESUB technology will be manufactured), we expect more licensing/multi-sourcing activities in the future that will bode well for embedded die packaging. Also, substrate suppliers like AT&S are working with industrial bodies like IPC to create standards. OSATs are less interested in embedded die technology, but they can collaborate with their substrate partners to leverage their experience and technology to develop the supply chain and create a value-added product that will be a win-win scenario for both. One example is the collaboration between Nanium and AT&S for E2CP (Embedded Embedded Component Package).

FO WLP panel level could enable a lower cost per chip. The industry’s general consensus is that FO WLP-on-panel will bring huge cost benefits. Many OSATs and equipment/materials providers are involved in FOWLP-on-panel’s process development, but at present only J-Devices has the established infrastructure for FO WLP-on-panel, while ASE is using their flip-chip infrastructure for low-cost FO WLP-on-panel production.

Certain criteria must be fulfilled and certain challenges overcome for FO WLP-on-panel’s broad adoption linked to large capex investment, equipment readiness, standardization, multisource availability, and most important, market availability to keep the panel line running. There are technical challenges too, such as warpage control, die placement accuracy, and fabrication of sub 10/10um line, etc. on large panels.

Glass panel interposer is another attractive platform for RF applications due to its considerable upside, which includes electrical performance, CTE match, and cost reduction opportunities. However, commercialization of glass panel interposer has limits linked to Through Glass Via (TGV) formation and metallization. Substrate makers and glass suppliers are pushing to validate glass panel interposer’s value, but OSATS, which have zero control over glass material’s cost structure and possess limited experience, are not likely to invest in glass panel technology’s development.

This report describes the different strategies and products used by each player in panel packaging, from substrate makers like Shinko to the core outsourced assembly-and-test companies (OSATs). We’ll also discuss strategies for overcoming the technical and market barriers preventing adoption of panel packaging platforms for high-volume manufacturing.

Players positioning involved in the panel level infrastructure Yole report 

Equipment and materials readiness for panel manufacturing

Today, the equipment infrastructure within the advanced packaging supply chain is mainly based on processing 300mm round wafers. But to process a larger surface, new equipment and optimized materials are required. For some process steps (i.e. plating, PVD, and dicing), most of the tools are readily available on the market and can be adapted from the PCB, flat-panel display, or LCD industries and are likely to be reused for producing panels. However, some key process steps inherent to advanced packaging, i.e lithography, necessitate developing new tool capabilities in order to support thick-resist lithography, panel-handling capability, exposure field size, and depth of focus.

Moreover, above 8- 10 µm L/S the PCB design rule dominates, and the equipment and materials infrastructure in this area is already established. The area below 8 µm represents a space where various equipment vendors like Rudolph, SUSS MicroTec, and Atotech are competing today. These vendors are either coming from the PCB infrastructure or acquiring other companies in order to bolster their flat-panel display knowledge.

Given the remaining challenges in need of solving for panel processes in Advanced Packaging, there will be huge business opportunities that could attract new equipment entrants coming from the PCB, LCD, and PV industries who might have the ability to apply existing panel-based tools for panel-scale packaging technologies.
On the materials side, the trends are that the key materials suppliers are using their current market-ready products for LCD and advanced packaging applications, and optimizing them to meet panel package requirements.

This report will discuss potential challenges linked to equipment and materials for panel processes.

Overview of equipment vendors offering tools for panel packaging Yole report 

Objectives of the Report

This report’s objectives are to:

  • Provide an overview of  existing packages processed on panel
  • Deliver a high-level market overview of  panel packaging
  • Identify panel packaging’s  drivers and trends
  • Offer a current status and forecast for panel packaging platforms
  • Highlight key players and provide supply chain analysis

 

Table of contents

Introduction, definitions & methodology…6


 

Executive summary…15



Overview of panel manufacturing……..20
Definition of panel infrastructure
Applications targeted by panel
General motivations and drivers
Key players’ global activities
Supply chain
Commercialization status
2014 - 2020 total market forecast

 

Focus on panel infrastructure for FO WLP…57


Key FO WLP-based panel players
FO WLP packaging infrastructure roadmap
FO WLP drivers for switching from wafer to panel
Technical requirements: panel size
Key challenges/unmet needs
2014 - 2020 market forecast

 

Panel infrastructure for embedded die package……….79


Products and technologies overview
Embedded die package:  infrastructure roadmap
Drivers for switching from wafer to panel for embedded die
Technical requirements
Key challenges/unmet needs
2014 - 2020 market forecast
Embedded die-based panel activity: key embedded die-based panel players: capacity

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Focus on panel infrastructure for glass panel interposer……….129


Organic interposer package:  infrastructure roadmap
Glass panel interposer players
Drivers for switching from wafer to panel for glass interposer
Technical requirements
Key challenges/unmet needs
2014 - 2020 market forecast

 

Focus on panel infrastructure for organic panel interposer…….149


Organic interposer package: infrastructure roadmap
Drivers for switching from wafer to panel for organic/glass interposer
Technical requirements
Key challenges/unmet needs
Organic panel interposer players

 

Equipment & materials toolbox…….180


Equipment for panel
Map of panel equipment vendors
Key equipment suppliers:  their businesses and status
Breakdown by process step/equipment type
Materials for panel
Map of panel material vendors
Key material suppliers:  their businesses and status


Appendices…….254


Overview of available products and technologies
Conclusion


Yole presentation…..307

 

 

 

 

 

 

 

 

 

 

 

 

Companies cited

AGC
Amkor
ASE
BESI
Dai Nippon
Dow Corning Corporation
Dow Electronic Materials
EP Works
Fraunhofer IZM
HD Micro/Dupont
Heidelberg Instruments
Ibiden
IMEC
Infineon

Intel
Jdevices
JSR Micro
Merck/AZ Em
Nikon
Orbotech
Orbotech
Panasonic
PlanOptik
Powertech Technologies
Rudolph
Samsung Electro Mechanics (SEMCO)
SCREEN
Shanghai Micro Electronics Equipment Co. Ltd. (SMEE)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shin-Etsu MicroSi
Shinko
SPIL
STATSChipPAC
STMicroelectronics
SUSS MicroTec
Texas Instruments (TI)
Tokyo Ohka Kogyo Co.  LTD. (TOK)
Triton Microtechnologies
TSMC
Unimicron
USHIO and many more

KEY FEATURES OF THE REPORT

  • Overview of panel packaging technologies that are available or in-development: FOWLP panel, embedded die, organic interposer, glass panel interposer, hybrid interposer
  • Commercialization status, market adoption and potential for each packaging technology
  • Drivers and challenges for technology adoption
  • Per-player product/technology description and analysis
  • Detailed supply chain, market adoption roadmap and volume forecast for each panel platform
  • Panel adoption and panel equipment readiness roadmap
  • Equipment and materials challenges