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"More Than Moore" will be everywhere in 2015

Silicon wafers have been the key substrates for digital and analog ICs since the beginning of the semiconductor industry. Yet other substrates and technologies like GaAs, InP, SiGe, sapphire have always been used in parallel for applications including RF devices, LEDs, and laser diodes.

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Amkor Technology licenses proprietary copper pillar wafer bump technology to GLOBALFOUNDRIES

Amkor Technology, Inc., a leading provider of semiconductor assembly and test services, announced that it has granted GLOBALFOUNDRIES a non-exclusive license to its proprietary copper pillar wafer bump technology. The agreement provides for the transfer of Amkor's copper pillar wafer bump technology to GLOBALFOUNDRIES and a license under Amkor's intellectual property to enable GLOBALFOUNDRIES to bump wafers based on this technology.

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Powertech Technology announces agreement with Micron Technology for assembly and packaging services in China

Powertech Technology Inc. (PTI) (6239. TW), a leading supplier of integrated circuit (IC) backend services, and Micron Technology, Inc. (Micron) (NASDAQ: MU), announced that they have entered into a series of agreements forming the basis of a long-term strategic relationship for assembly and packaging services in Xi'an, China.

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IMAPS France MiNaPaD Forum April 22-23 - Call for Papers

IMAPS France announces the 4th edition of the Micro/Nano-Electronics Packaging and Assembly Design and Manufacturing Forum (MiNaPaD) to be held at the World Trade Center (WTC) in Grenoble from April 21-23, 2015. The deadline for abstract submission is January 30.

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A 3D TSV webinar in connection with the European 3D TSV Summit

In connection with the European 3D TSV Summit, a dedicated 3D TSV Webinar will take place on Thursday December 11, 2014, at 16:00 CET.

The Webinar will host three experts to talk about both the market outlook and the technological advances being made in the domain of 3D-IC.

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LATEST EVENTS

SEMICON JAPAN
( December 3 - December 5, Tokyo, Japan )
3D Architectures for Semiconductor Integration and Packing (3D ASIP)
( December 10 - December 12, Burlingame (CA), USA )
European 3D TSV Summit
( January 19 - January 21, Grenoble, France )
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