powered by:
yole développement

Slider home

Anjinamoto build up films for high density substrates: a closer look

Phil Garrou for Yole Développement. In the early 1990s, Ajinomoto started a project to develop an insulating film formulation, about a decade later (1999) ABF (Anjinamoto Build-up Film) was accepted by Intel and the rest of the CPU manufacturers for their high density substrates. iMicronews thought taking a look at the current status of ABF was worth....A closer Look.

Read more...

Do you want a very thin package for a multiple die SiP? Go for FO WLP...

Fan Out Wafer Level Packaging is now entering competitive area with multiple design available and FOWLP growth is attracting new companies like TSMC, J-Devices and many others. The market reached more than $150M in 2014 and we are expecting a CAGR of 30% for the next 5 years, driven by mobile applications and the need of very thin packages for high I/O devices.
We have discussed with Steffen Kroehnert, Director of Technology at NANIUM about the growth strategy using FO WLP from the beginning of the company as a key enabling technology. Discover how you can develop a strong packaging services activity based on an innovative process from Europe.

Read more...

Fan-Out Wafer Level Packaging: with a $200M market in 2015, Yole is expecting 30% CAGR in the coming years …

“Fan-Out Wafer Level Packaging (FOWLP) is already in high-volume” announces Yole Développement (Yole) in its new report, Fan-Out and Embedded Die: Technologies & Market. According to Yole’s analysts, FOWLP market reaches almost $200M in 2015. And the More than Moore market research and strategy consulting company, Yole expects 30% CAGR in the coming years. What can explain such a great potential?

Read more...

Advances in the packaging of network processors - A closer look

Phil Garrou for Yole Développement - At the recent SEMI 3DIC Summit in Grenoble Georg Kimmich of ST Micro gave a presentation on Network packaging trends. iMicronews thought it was worth ...a closer look.
Below we see the current typical packaging for a networking ASIC chip. It consists of a 8-16 layer 35-55mm flip chip BGA with a metal lid to handle the 50-200W power.

Read more...

IPDiA expands its high temperature (250°C) Silicon Capacitor lines, dedicated to MCM assembly modules, with new voltage ranges from 11 V to 450 V

IPDiA, world leader in 3D silicon passive components, is launching the ETSC (200°C) and EXSC (250°C) silicon capacitor ranges to expand its product offering to higher voltage MCM applications.

Read more...

Yole Développement announces foundation of BLUMORPHO

logo blumorpho moyen

BLUMORPHO will create value from innovation. Today Yole Développement (Yole), the market research, technology and strategy consulting company announces the founding of daughter company, BLUMORPHO SAS. BLUMORPHO's mission is to create value from all forms of innovation.

Read more...

UPCOMING EVENTS

tile 150x87
> Image Sensors 2015
(March 17 - March 20, London, UK)
01