> Claudio Truzzi, CTO of Alchimer

Dr. Truzzi's career spans every facet of the semiconductor industry, including R&D, Engineering, Manufacturing and Product Development. He has over 20 years' experience in the field of microelectronics and has previously held executive level positions as CEO of IC packaging consultancy Convergix, and at CS2 where he was CTO and VP.

Most recently, Dr. Truzzi has worked as an independent consultant to several large players in the EMS, semiconductor manufacturing equipment and wafer-level process companies. His career includes Assistant Professor position at various Universities and numerous publications. Dr. Truzzi holds an MSc from the University of Bologna and a PhD from the University of Turin and is an IEEE member.

Could you introduce us to Alchimer’s company background and business model in the semiconductor industry?

Alchimer is a spin-out from France's CEA (Commissariat à l'Energie Atomique), the French atomic energy authority. It has developed materials and process IP for creating thin coatings on the inside of high-aspect ratio through-silicon vias (TSVs). CEA sits at the very foundation of heavyweights such as ST Microelectronics and SOITEC, as well as worldwide respected R&D Labs LETI.

Our technology involves the chemical functionalization of conducting and semi-conducting surfaces with proprietary electro-grafting (eG™) and chemical grafting (cG™) technology. This wet chemical nanofilm technology permits the application of highly controlled, ultra-thin coatings providing three key properties: conformality, uniformity and adhesion, using industry standard plating tools. This enables the cost-effective manufacturing of TSVs with aggressive aspect ratios of 10:1 and greater, and unlocks the adoption of advanced 3D IC packaging.

As an IP company, Alchimer’s business model is based on licensing the technology to the users, as well as those providing production volumes of chemistry.

 

Alchimer recently introduced the “eG ViaCoat”, an electro-grafting process for highly conformal seed layer depositions. Can you tell us more about the initial motivations to develop such innovative process?

In 1994, CEA researchers proved how the electro-grafting reaction leads to the formation of very strong covalent bonds between organics and polarized (semi)-conducting surfaces. The term “grafting” comes from an analogy with botanic, as it is alluding to a strong and counter-intuitive assembly of two very dissimilar materials, such as polymers and metals.

Ten years and many improvements later, under impulsion of the LETI labs, it was proven how organic layers act as a sponge for copper ions, reducing them within the film. This paved the way to hyper-conformal seed layers obtained with cost-effective wet processes.

Application to Semiconductor processes was just one step ahead, so Alchimer acquired all IP rights for the application of electrografting to the semiconductor industry. About one year ago, it became painfully clear to our industry how the traditional dry-process approach to high-aspect ratio TSVs represents a roadblock for the mainstream adoption of 3D-IC applications. To make a long story short, we have now a solid portfolio of 22 patents families (and counting…), and several tier-1 customers actively evaluating our solution.

 

Could you elaborate on how electro-grafting can benefit to the 3-D TSV industry? How do you position it in comparison to other seed layer technologies such as ionized PVD, MOCVD and electroless via filling processes?

Benefits are twofold. On the one hand, our commercially available product eG ViaCoat can easily and cost-effectively provide conformal Cu seed layers with strong adhesion (we successfully pass the scribe test). ViaCoat totally eliminates the need for highly expensive iPVD tools for the deposition of Cu seed layers on the inner walls of high aspect ratio vias. Cost savings can amount to as much as 80% in equipment and consumables.

On the other hand, we have recently announced our “AquiVia” concept, ready for selected beta test customers by first quarter of next year. AquiVia enables the deposition of insulation, barrier and seed layers using exclusively wet process steps. It is based on a sequence of electro and chemical grafting steps, and it provides for more than 50% reduction in Cost of Ownership (CoO) for the overall insulation / barriers / seed / fill step, coupled with 80 % step coverage on extremely scalloped 10:1 TSVs. The model used for this comparison assumes investment in new equipment, both for the dry and wet flows. However, Electrografting works equally well on legacy equipment. The electroless via filling is a perfect complement to our approach.

 

How does Alchimer plan to commercialize its “eG ViaCoat” technology? Can you comment on who is likely to handle the seed layer deposition step in the 3D TSV supply chain?

Alchimer is an IP-driven company. Fabs will benefit from our technology through an end-user license agreement. We are also in the process of inking agreements with tool suppliers that will be enabled and certified by us. Likewise, high volume production of chemicals will soon be secured through partnership agreements with selected tier -1 chemical suppliers. Meanwhile, we have internal production capacity to cover initial qualifications and volume ramp up for the coming year at least.

As for the second part of your question, I believe we will soon realize that there will be not just one, but multiple 3D TSV supply chains. We see a wide range of TSVs coming into our labs with a variation in diameter, ranging through 2 orders of magnitude - they are different components serving different industrial sectors. I see different supply chains setting up around dense, tiny, very high-aspect ratio via, for via first solutions implemented in the fabs, and large, maybe conformal via, for via-last approaches for packaging applications. One interesting aspect is that the fundamental mechanism of our technology depends solely on the chemical bath concentration – not on the topological parameters of the structure. The scope of our approach is therefore very broad.

 

Could you share with us your vision on the 3-D TSV market? As many via filling scenarios are currently being developed, which applications are really driving the need for high aspect ratio (>10:1) copper electroplated and completely filled vias?

This is a complex question and there is no one definitive answer given the variety of scenarios spread across the customer and product landscape, but this is my view at present: the main industry driver will continue to be cost, and it is clear that cost is mainly a function of materials and depreciation. As such, the TSV solution that will prevail must minimize cost to the manufacturer while meeting performance criteria. Copper interconnects have now become so embedded in the infrastructure that high performance can be delivered at very low cost. As far as dispensing the copper, I think we have made it clear that although iPVD has made great strides in process performance, the economics are simply not there to address a commodity structure such as TSV. But there are limits as to how low one can go with cost before compromising design rules. Although paste printing seems like an interesting candidate for driving the economics down to board level productivity, the process is not yet ready to deal with state of the art geometries expected at the wafer level.

As far as which products are pushing the >10:1 aspect reaction visa, it is clear that the higher value add devices on 300 mm wafers will be the application due to handling issues and the price of real estate. Memory is leading the way, but RF MEMS and logic devices are coming on with SIP applications.