|
|||||||||||||||||
|
Home
> ADVANCED PACKAGING: 3D IC, WLP & TSV
> Interview
> ADVANCED PACKAGING: 3D IC, WLP & TSV
> INTERVIEW
Aug 7th, 2009
NEC Schott introduces Glass Substrates with Hermetic Metal Through Vias for WLP of MEMS & Sensor applications
> Yutaka Onezawa and Hiroshi Kamada, from NEC SCHOTT Components Corporation
Yutaka Onezawa graduated from the Kansai University and joined Kansai Nippon Electric Co., Ltd. in 1988. As the plannner, he was responsible for the Strategic Business Planning of Capacitors and Color Display Tubes. Since joining NEC SCHOTT Components Corporation in 2000, Yutaka Onezawa has been actively involved in various Sales and Business Planning projects of the Hermetic Seals business unit.
Hiroshi Kamada graduated from Kyoto University and joined New Nippon Electric Co.,Ltd. in 1978. In his role as the engineer, he was responsible for the research and development of the tantalum capacitor and ceramic capacitor. After joining NEC SCHOTT Components Corporation in 2000, he has been actively involved in various R&D projects. In his present position since 2003, Hiroshi Kamada is engaged in the development of new electronic packaging solutions at the Hermetic Seals business unit. He is also a member of the IEICE as well as the Ceramic Society of Japan NEC SCHOTT Components Corporation, established in Sept 2000, is a joint venture company between Japanese electronics and computer corporation NEC and SCHOTT. The core technologies are glass-to-metal and ceramic-to-metal sealing, thermal sensing components as well as a variety of cutting edge specialty glass competences. With 1,500 employees at five production locations and several competence centers around the world, local customer support and co-developments for individual packaging solutions are at the heart of the business, serving the world’s leading manufacturers in the automotive, data- and telecommunication, sensors and semiconductors, consumer electronics, dental care, home appliances, laser as well as security and tracking industries.
> YOLE
Can you explain to our readers the key characteristics of NEC Schott HermeS technology? What is the added-value of this hermetic substrate technology?
> Yutaka Onezawa and Hiroshi Kamada
SCHOTT HermeS is a glass wafer featuring hermetically sealed electric feedthroughs with Tungsten vias. This product enables MEMS to be hermetically sealed thereby protecting sensitive electronic components while still allowing electronic signals to enter and exit the system. Customers will be able to not only manufacture smaller packages than what is currently available with conventional packaging techniques, but they would also be able to achieve economies of scale.
SCHOTT HermeS has 3 essential characteristics: - Full hermetic solution: That is a key requirement for most MEMS devices today. Thanks to a breakthrough in the manufacturing technology, the leakage rate is less than 10-9 pa•m3/sec, with long-time stability. For more than 50 years, our company has accumulated experience with glass-to-metal sealing technology – a technology similarly used for many decades in opto-packages, automotive electronics and life science applications – this is the “secret” behind HermeS. - Complete 3D WLP solution: Designing packaging solutions with HermeS helps our customers to realize economies of scale due to substantial reduction in the cost per die. Through its fine-pitch via feedthroughs, HermeS enables direct 3-D interconnect designs and allows for highly compact, miniaturized package designs and functional integration. - Specific properties of glass: Glass has intrinsic properties which is key for specific applications. With a low dielectric constant (4.6 for the Borofloat® 33 Borosilicate Glass), superior RF performances (low RF loss) can be achieved. Optical transparency is another interesting property. This is not only useful for optical devices but also enables entirely new possibilities with respect to quality control. For instance, even after the device has been packaged, visual inspections can be performed on the MEMS or it can be adjusted using laser light. This wouldn’t be possible with metal housings. > YOLE
Can you elaborate on the applications where HermeS is used today? Which types of devices are mostly impacted by this development (MEMS, CMOS image sensors and other optical devices, interposers…)?
> Yutaka Onezawa and Hiroshi Kamada
HermeS has garnered the interest of several companies in the industrial applications area. Some examples include gyroscopes, accelerometers, pressure sensors and RF switches. We have a number of customers currently evaluating the product, as well as several projects in the phase of production ramp-up.
This said, although HermeS was initially designed to meet the requirements of MEMS packaging, we have recently detected a strong interest for HermeS in optical devices as well. Particularly in Japan, this interest is stemming from optical switches used for telecommunication networks. Small LCD and image sensors are also very promising applications. Both CMOS and CCD image sensors can utilize this technology, and not only for the visible range; IR image sensor for night vision could also benefit from it, where the reduction of package size is a big driver. HermeS is really an enabling technology for many devices, and we believe that now is the opportune time to have the next generation of packages designed with this technology. > YOLE
What are the main benefits of using a via in glass technology for encapsulation today? How do you compare it with through silicon via technologies?
> Yutaka Onezawa and Hiroshi Kamada
Hermetic Wafer Level Packaging (WLP) of MEMS Devices using NEC SCHOTT HermeS™ Glass substrate solution
In addition to some of the technical advantages of this glass technology, such as optical transparency and superior RF isolation, electrical reliability is also very high since glass is an insulator and the via being a solid metal. Therefore, there is no risk of short circuit or other electrical problems that frequently happen because of using paste filled vias. Peeling metallization problems can also be avoided, because of the good coefficient of thermal expansion (CTE) match between the Tungsten via, glass, and the MEMS wafer.
The key motivation, nonetheless, would be the lower total cost of ownership. By applying state-of-the-art wafer-level packaging technologies, SCHOTT HermeS™ enables significant yield improvements, higher reliability and process stability, as well as the avoidance of expensive equipment used in TSV packaging. In addition, simple anodic bonding methods can also be used. TSV technologies, based on silicon wafers, have made impressive progress in the last couple of years. While current HermeS specifications are sufficient for a wide range of applications, we are working to improve upon higher via densities and finer pitch. For example, we are developing 8" wafers with 200μm pitch and 80μm via diameter for launch in 2010 – this translates to wafers with about 40,000 vias per wafer. More ADVANCED PACKAGING: 3D IC, WLP & TSV interviews |
||||||||||||||||
©2007 Yole Developpement All rights reserved Disclaimer | Legal notice | To advertise
Yole Développement: 45 rue Sainte Geneviève, F-69006 Lyon, France. TEL: (33) 472 83 01 80 FAX: (33) 472 83 01 83 E-Mail: info @yole.fr |
|||||||||||||||||