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Jan 17th, 2013
 
SK Hynix readying for 3D stacked memory commercialization: a closer look
 
At the recent RTI 3D ASIP Conference in Redwood City Minsuk Suh, principle engineer at SK Hynix was available to discuss stacked memory technologies. iMicronews thought review of Hynix stacked memory technology was worth… A Closer Look.
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Suh indicated that SK Hynix like their competitors Samsung and Micron/Elpida are readying themselves for stacked memory product introductions. Suh noted that “ Cost is the 1st barrier for successful TSV memory stack business” and this is the issue that all memory suppliers are working on.

Suh, currently a SK Hynix assignee to the Sematech 3D Interconnect program, which SK Hynix joined in 2011, explains their goal at Sematech  “…collaborating with industry-leading partners, we expect to play a critical role in accelerating the commercialization of wide I/O DRAM and to realizing 3D’s potential as a manufacturable and affordable path to sustaining semiconductor productivity growth.”

SK Hynix has been working on stacked memory with TSV for several years. In 2008 they announced their ability to stack NAND flash, in 2010 their prototypes for LPDDR2 and in 2011 their 16 Gb, 8 chip stacked DRAM and logic chip.

SK Hynix 4 Gb flash, 4 Gb DRAM and 16 Gb DRAM

Suh indicates that there are different motivations for stacked DRAM depending on the application. Their 3DS products (solder ball + organic substrate + stacked memory chips) will be focused on Main Memory” and HBM products on  Networks and Graphics applications.

Main Memory
- System Bandwidth / Memory capacity Core                                                                                                          
- System power budget                                                                                                                                                 
- Homogeneous stack

Mobile applications
- System power budget                                                                                                                                                 
- Heterogeneous vertical stack

Graphics and Network applications
- System power budget 
- System Bandwidth                                                                                                                                                                            
- Form factors of discrete graphic system
- Heterogeneous vertical stack

SK Hynix High Bandwidth Memory (HBM)

2.5D HBM and 3D mobile WIO2 are compared below.  Suh expects that “ …if we can solve issues such as thermal dissipation, I expect that we can use HBM 3D stack without an interposer

Comparison of 2.5D HBM and 3D wide IO 2 Memory

The system power budget is of concern for most memory applications and stacked memory structures give a significant advantage over std architecture in terms of IO power consumption.

IO power comparison in a graphics system (Ref: SK Hynix)

HBM and mobile wide I/O are further compared below.

High Performance vs Mobile Wide IO Memory

In terms of industry product introductions, SK Hynix sees HBM, high performance memory stacks for graphics and network applications driven by bandwidth in development in 2012 with low production expected 1H of 2014 ramping to volume 2H of 2014. This will be closely followed by DDR4 3DS for server applications, driven by capacity with low production expected in early 2014 and ramping to volume late 2014. Next will be wide IO 2 (WIO2) for mobile applications like smart phones and ultrabooks driven by form factor and power with low production expected in 2014, ramping to volume in early 2015.
                                                                                                                                                      
In terms of supply chain management, SK Hynix favors the open ecosystem where logic and memory prepared with / for TSV are manufactured at foundries and IDMs and assembled at OSATs.

 

 

 
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