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Jul 3rd, 2013
SPIL announces OSAT turnkey model: a closer look
At the recent ConFab Conference in Las Vegas Mike Ma, VP of Corporate R&D for SIliconware addressed SPILs position in the 2.5/3D Supply chain.
Mike Ma of SIliconware (SPIL) contends that we are now in the system integration era where multiple functions are integrated into a single system. He sees more and more customers asking to move traditional SoC (system on chip) solutions to 2.5D interposer based SiP (system in package) solutions.
Siliconware simulation capabilities (Source: SIliconware)
They see 2.5D IC technology as a cost effective solution for system integration
SoC vs 2.5D (Source: Siliconware)
Up to now two active business models existed in the 2.5 / 3DIC supply chain: (A) the “collaboration model” each had defined roles and worked together to fabricate the desired module and (B) the “foundry turnkey” model, proposed and required by TSMC where the foundry fabricated the chips, the interposer and did all the assembly and test. SPIL reports that they have developed such a position with two foundries (presumably UMC and Global ) and have been working with a third (SMIC ?).
Technology has been established by the collaboration model (Source: Siliconware)
At the ConFab meeting they announced that they were now proposing a 3rd business model, namely the OSAT turnkey model where the OSAT receives chips from several sources, fabricates the interposer and does the assembly and test.
Now there are three (3) 2.5D business options (Source: Siliconware)
What has restrained this option in the past has been the lack of high density (i.e. dual damascene) processing at the OSAT to produce the required high density silicon interposers. SPIL has now announced that dual damascene equipment is in place to fabricate < 1.0µm lines and 0.5µm TSV.
Sub 1 µm Lines and 0.5 µm TSV By SPIL Dual Damascene Processing (Source: Siliconware)
To achieve even lower cost 2.55D solutions SPIL proposes large area processing to fabricate organic interposers. Their goals are to achieve 3 µm lines by end of this year and 2 µm lines by 2015.
Large area laminate processing for low cost interposers (Source: SIliconware)
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