webleads-tracker

Home  >  ADVANCED PACKAGING  > STATS ChipPAC introduces Copper Column Bumping for Low Cost ...
  >  ADVANCED PACKAGING
May 26th, 2010
 
STATS ChipPAC introduces Copper Column Bumping for Low Cost Flip Chip Technology
 
Combining copper column bump with LCFC reduces total cost and delivers a lead-free solution that is scalable to finer pitches.
Send to a friend
STATS ChipPAC"s low cost flip chip (LCFC) technology now utilizes copper column bump
STATS ChipPAC's low cost flip chip (LCFC) technology now utilizes copper column bump

STATS ChipPAC today announced that its low cost flip chip (LCFC) technology now utilizes copper column bump to deliver a powerful packaging solution at a dramatically reduced cost for its customers. STATS ChipPAC’s LCFC technology, introduced in 2009, has offered semiconductor companies the opportunity to have flip chip packages at price points below wire bond packaging due to its innovative routing efficient interconnection structure, simplified substrate design and cost effective mold underfill process. The unique structure of LCFC when combined with copper column bump achieves an even lower cost solution with higher routing densities and is scalable to finer bump pitches.

As technology continues to move toward finer silicon nodes to achieve increased functionality, input/output (I/O) densities are steadily increasing. The use of conventional solder bump makes the chip attach and underfill processes become more challenging and there is potentially an increased risk of electromigration due to the higher current density induced by the scaling of features. Copper column bumps enable a higher I/O density with a much finer pitch between the columns than standard solder bumps along with a higher resistance to electromigration. Although copper column is a hard bump material that can typically cause damage to low K (ELK) layers in finer silicon nodes, the LCFC interconnect structure dramatically reduces the mechanical stress on silicon sub-surface layers resulting in the elimination of the low K damage phenomenon commonly observed in sub-45 nm silicon modes.

“For applications requiring high I/O densities with a flip chip bump pitch below 150 microns, copper column bump provides a more effective interconnect structure compared with solder bumps,” said Dr. Raj Pendse, Vice President of Technology Marketing, STATS ChipPAC. “By incorporating copper column bump into our low cost flip chip technology, STATS ChipPAC has expanded the range of applications for which high end flip chip technology can be deployed.“

The incorporation of copper column bump has enhanced the LCFC offering in three main areas:

  • Copper column bump enables a more dramatic simplification of the substrate features resulting in additional cost reduction.
  • The LCFC interconnection structure with copper column bump is highly reliable and reduces mechanical stress on extra low K (ELK) layers in finer silicon nodes.
  • The LCFC packaging solution using copper column bumps is Pb-free which supports the semiconductor industry’s transition to using environmentally friendly materials in microelectronics.

Dr. Pendse continued, “Utilizing a copper column interconnect in low cost flip chip packaging achieves a lead-free solution that is reliable and scalable to very fine pitches and provides a natural migration path to solutions such as 3D, Through Silicon Via (TSV), micro bump and green solutions for the future.”


 
More ADVANCED PACKAGING news

Aug 29th
Aug 25th
Aug 12th
Aug 12th
Aug 11th
 
©2007 Yole Developpement All rights reserved                  Disclaimer | Legal notice | To advertise
Yole Développement: Le Quartz, 75 cours Emile Zola, 69100 Villeurbanne, France. TEL: (33) 472 83 01 80 FAX: (33) 472 83 01 83 E-Mail: info @yole.fr