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Jul 29th, 2011
International Wafer-Level Packaging Conference (IWLPC) program finalized and registration now open
The SMTA and Chip Scale Review magazine are pleased to announce the presentation line-up for the 8th Annual International Wafer-Level Packaging Conference. The IWLPC will be held October 3-6, 2011 at the Santa Clara Marriott Hotel in Santa Clara, California. Registration is now available on-line and Early Bird conference pricing is in effect until September 2, 2011, after which registration prices will go up $100.
Attendees will benefit by gaining the latest knowledge with eight application-oriented tutorials, 10 technical sessions, two expert panel discussions, and a keynote presentation from distinguished speaker Raj Master, General Manager, Microsoft Hardware Silicon, Packaging, Quality and Reliability, titled "Thermal and Power Considerations in Electronics Packaging."
The conference includes three tracks with two days of technical paper presentations covering: Wafer Level Packaging; 3-D (Stacked) Packaging; and MEMS Packaging.
Exhibit space is limited but there are still tabletop spaces available. Please contact Seana Wall, email@example.com, at SMTA or any sales representative with Chip Scale Review at firstname.lastname@example.org with questions or for more information about the exhibition.
This premier industry event explores leading-edge design, material, and process technologies focused on Wafer-Level Packaging applications. There will be special emphasis on the numerous device and end product applications (RF/wireless, sensors, mixed technology, optoelectronics) that demand wafer-level packaging solutions for integration, cost, and performance requirements.
The SMTA membership is an international network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies, including microsystems, emerging technologies, and related business operations.
Chip Scale Review, now entering its 15th year, is the leading international magazine serving the semiconductor, IC and electronic device packaging market.
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