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Feb 22nd, 2012
3D heterogeneous integration of MEMS + CMOS: a closer look
Singapore researchers from Nanyang Technological University reported on the 3D integration of MEMS and CMOS using Cu-Cu bonding. I-Micronews thought this deserved ”A Closer Look”.
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At the recent IEEE 3DIC meeting in Japan researchers from Nanyang Technological University in Singapore reported on the 3D integration of MEMS and CMOS using Cu-Cu bonding to simultaneously achieve electrical and mechanical bonding and a hermetic seal.

A MEMS accelerometer was fabricated in SOI technology and a MEMS readout circuit is implemented n 0.35 um technology. Die to wafer stacking is achieved by bonding the readout circuit to the MEMS wafer as shown below. This is a TSV – less bonding process. 

3D Stacking of MEMS and CMOS

The bonding layer is composed of 300 nm of Cu and 50 nm of Ti barrier.  Bonding was carried out below 300 C. An SEM of the fully released accelerometer is shown below.

SEM micrograph of the suspended accelerometer

The CMOS readout circuit successfully amplifies, demodulates, low-pass filters and recovers the acceleration signal from the accelerometer device. The readout has a sensitivity of 5.1mV/g with a +/- 30 g measurement range. 
A cross sectional SEM of two bonded chips is shown in the figure below. The two copper layers have fused together resulting in a seamless interface.  No voids are observed in the bonding interface.  The electrode pad of the MEMS device is bonded toaconnection pad on he CMOS die and is routed to external by the lower metal layers of the CMOS chip

Cavity sealed with Copper-Copper bonding

Based on these results one can see that Cu-Cu thermo compression bonding can provide hermetic sealing and that a CMOS circuit layer can be used as an active cap to seal and protect MEMS structures.


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