Coventor, Inc., a supplier of virtual fabrication solutions for semiconductor devices and micro-electromechanical systems (MEMS), shared the SEMulator3D 2013 software platform at SEMICON West 2013.
Conventor says the SEMulator3D 2013 brings physical accuracy and predictive modeling capabilities to process development and integration. This milestone release expands the value of ‘virtual fabrication’ to the broader semiconductor ecosystem in order to reduce silicon learning cycles and the billions of dollars spent reaching manufacturing readiness.
SEMulator3D 2013 release comes at a particularly critical time for semiconductor companies grappling with the complexities of integrated 3D front-end-of-line (FEOL) manufacturing processes such as Tri-Gate and High-k/Metal Gate logic, as well as advanced 3D memory technologies. Fabless design teams also face tremendous challenges migrating their intellectual property (IP) into these new technologies. SEMulator3D 2013 responds to such evolving requirements with an advanced virtual fabrication platform that makes it possible for foundry and fabless development teams to effectively collaborate at the physical process level.
“With new silicon architectures ramping quickly, IBM is introducing new manufacturing technologies that will keep us on the cutting edge of chip-making for server microprocessors, systems-on-chips and specialty silicon for consumer applications,” said Gary Patton, vice president, IBM Semiconductor Research and Development Center. “Tools such as Coventor’s SEMulator3D Virtual Fabrication platform have allowed us to speed our end-to-end technology development in 22nm and beyond, enabling a faster time to market for our customers who depend on IBM innovation to create the latest servers, smart phones, GPS systems, routers and other devices.”
At the core of the new SEMulator3D 2013 platform is a physics-driven modeling paradigm for addressing physical process behavior that makes virtual fabrication more predictive and provides new opportunities for replacing actual silicon learning cycles with faster, less costly virtual cycles. In addition, virtual metrology innovations and the automation of virtual experiments enable process developers to perform virtual fabrication operations in hours or days instead of the months required for actual silicon learning cycles.
“Time and complexity challenges are the two constants in semiconductor design and manufacturing, and the growing trend toward 3D integrated technologies like FinFETS has introduced unprecedented levels of pain in both areas. SEMulator3D 2013 addresses the need for more efficient, automated approaches to process modeling, as well as the need for greater levels of collaboration by both ends of the development process. The net result is a dramatic reduction in the time and cost required to leverage the most advanced manufacturing techniques required to keep pace with Moore’s Law and fuel even more innovation across the electronics industry,” according to Dr. David Fried, chief technology officer at Coventor.
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