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May 31st, 2012
Die-to-die bonding using copper pillars
Advantages over solder bumps include higher interconnect densities, higher reliability, improved electrical and thermal performance, and reduction or elimination of lead.
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In packaging applications for cellular electronics devices, the use of flip chip copper pillar bumps has been expanding due to its better shape, lesser thickness, smaller form factor, better performance and lower power consumption. Foundries and semiconductor manufacturers are actively evaluating this new technology as the chips are becoming complex and size is shrinking day by day which leads to higher pin count and large interconnect densities which can hamper manufacturability of the bump pad.

This paper provides an update on the advantages of copper pillar bumps over conventionally used solder bumps; copper pillar bump design and layout, fabrication and benefits in flip chip package assemblies.

Full text here.



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