Table 1 presents a summary of the package sizes for a variety of three-axis accelerometer devices, plus the STMicroelectronics LIS2L02AS, with the corresponding MEMS and ASIC die sizes and the calculated package efficiency for each device.

Between 2004 and 2007, Chipworks did analyses of various versions of STMicroelectronics LIS3L02 three-axis accelerometer, including the LIS3L02AQ, the LIS3L02AQ3 and the LIS3L02AE. The latter was an OEM part and was extracted from a Nintendo Wii analog controller, and constituted one of the early design wins in the gaming market space. The LIS3L02AE came packaged in an 8 lead, land grid array (LGA-8) package that measured 5.0 mm x 5.0 mm x 1.5 mm thick, seen in Figure 3, which corresponds to nearly a factor of eight reduction of volume as compared to the earlier two-axis LIS2L02AS. The reduced package area was achieved partly by stacking the ASIC over the die, as shown in Figure 4, thus allowing the MEMS and ASIC die area to occupy 70% of the package area, as indicated in Table 1

As an aside, it is worth noting that Analog Devices also had a design win in Nintendo game controllers, with their slightly smaller 4 mm x 4 mm x 1.45 mm ADXL330 three-axis accelerometer. The ADXL330 was a single chip solution, fabricated with Analog’s integrated iMEMS process.

A milestone in the development of accelerometers for consumer electronics application was the appearance of the digital Bosch SMB380, three-axis accelerometer, announced in January 2007, which came packaged in a 3.0 mm x 3.0 mm x 0.9 mm thick QFN package, shown in Figure 5 (also available as the BMA150 in an LGA package).

Achieving the very thin package required mounting the ASIC and the MEMS die side-by-side, see Figure 6, which necessitated a quite dramatic 50% reduction of the area of the two die, as compared to the earlier Bosch SMB363. The packaging efficiency for these two Bosch parts is similar, at 55% and 47% for the SMB363 and SMB380 respectively. The smaller package size for the SMB380 was accompanied by a similar decrease in the die sizes.

Bosch’s market leadership did not last long, with Freescale, Kionix, STMicroelectronics and Analog Devices all launching 3-axis accelerometer in thin 3.0 mm x 3.0 mm packages.

The Freescale PMMA7660 was fabricated using their surface micro-machined process, with the MEMS and ASIC die mounted side-by-side, as indicated in Figure 7. The Kionix KXSD9 was fabricated with their single crystal bulk micromachining process, with the MEMS and ASIC die also mounted side-by-side, as shown in Figure 8. The Freescale and Kionix parts have a similar ~50% packaging efficiency to that obtained by Bosch for the SMB380, as indicated in Table 1, above.

By contrast, STMicroelectronics chose to stack the MEMS and ASIC die in their 3 mm x 3 mm x 1 mm thick LIS331DL as seen in Figure 9. Comparison of the LIS3L02AE with the LIS331DL shows that STM had shrunk the total die area by almost a factor of three, while maintaining the package efficiency about the same at 0.75. The stacked geometry meant that they did not need to scale the die sizes as aggressively as Bosch, Freescale and Kionix to achieve the 3.0 mm x 3.0 mm size.

Achieving the 1.0 mm thickness of the LIS331DL required significant thinning of the dies, as compared to the earlier LIS302AE device. In the case of the LIS3L02AE the total thickness of the three die is 901 µm, while for the LIS331DL the total thickness is 520 µm. They were not able to achieve the market leading 0.9 mm thickness of their competitors. This would have require a further 100 µm reduction in total thickness for the three die.

Analog Devices appears to have abandoned their long-standing, integrated iMEMS process, and used a separate MEMS and ASIC die mounted side-by-side to fabricate their new ADXL345. Chipworks analysis shows the MEMS die to be fab’d with their iMEMS process, while the ASIC die is likely made by TSMC. It is worth noting that Chipworks has reported on the 3 mm x 5 mm ADXL345 but not the smaller 3 mm x 3 mm ADXL346 (which is not yet available on the market). The ADXL345 has a packaging efficiency of 32%, suggesting there may be ample room to shrink to a 3 mm x 3 mm package, while using the same two dies.

The smallest three-axis accelerometer seen by Chipworks, and targeted at CE applications is the 2.0 mm x 2.0 mm x 0.94 mm thick VTI CMA3000. Figure 10 presents a bottom view of the device. The CMA3000 is fabricated using VTI’s novel 3DIC technology. The MEMS device is essentially a chip-scale sandwich of several layers, shown in Figure 11, with the ASIC flip-chip bonded to the bottom side. The absence of a plastic mold package allows for dramatic shrinking of the device. The stacked chip scale package (CSP) give the ratio of the complete device area to the MEMS plus ASIC die area to be an impressive 143%. This VTI example, where the packaging efficiency is greater than 100%, clearly shows the benefits of stacked die for increased integration within a given device footprint.

The results presented here suggest that packaging efficiencies of ~50% are achievable when a side-by-side geometry is adopted, using current technologies, while significantly higher efficiencies (even above 100%) can be achieved with stacked geometries. Stacked geometries, however, require much more aggressive thinning of the dies, if sub 1 mm thick packages are desired, which may be problematic for some MEMS processes. If Bosch, Freescale and Kionix were to adopt stacked geometries, then they could achieve substantial reductions in package area. In the case of the Bosch SMB380 a smaller than 2.4 mm x 2.4 mm package size should be feasible, assuming the 75% package efficiency achieved by STMicroelectronics for the LIS331DL.

Even more dramatic reductions in device size would be achievable if the major players adopted VTI’s chip scale package approach. The addition of through silicon vias (TSVs) through the MEMS cap die would allow the ASIC to be flip-chip bumped to the top side of the cap die. Device sizes smaller than 2 mm x 2 mm should be easily feasible, given the ASIC and MEMS die sizes reported in Table 1, above. It is not clear, however, whether the market will demand devices smaller than the current 3 mm x 3 mm size being offered by the major suppliers. The success of the VTI CMA3000 in the market will likely determine whether of other suppliers adopt a CSP strategy.

About the Author:

St.J. Dixon-Warren
Manager, Process Analysis, Technical Intelligence, Chipworks Inc.
He can be contacted at sdixonwarren@chipworks.com