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Home  >  ADVANCED PACKAGING: 3D IC, WLP & TSV  > Ex-ST exec calls for European EDA industry to take strategic...
  >  ADVANCED PACKAGING: 3D IC, WLP & TSV
Jan 21st, 2010
 
Ex-ST exec calls for European EDA industry to take strategic view about 3D SiP with TSV
 
Writing in an article on EDA DesignLine, Borel argued for an international EDA roadmap. As Moore's Law splinters and new approaches such as TSV gain credibility, he said it's time for EDA to move to a more open approach in terms of sharing the definition of priorities and sharing strategic developments requested by users. It's time for EDA to adopt a more productive approach
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3D TSV Roadmap (Source: ASE, EMC-3D)
3D TSV Roadmap (Source: ASE, EMC-3D)

The publication of the article began with a discussion between Borel and EDA DesignLine. "Does the EDA industry have a roadmap? My answer to this question is definitely YES," emphasized Borel, now at the JB-R&D EDA consulting company. "Europe has an EDA roadmap, and has had it for several years within European programs, established on my initiative, under my responsibilities and in collaboration with all European players." Indeed, Europe has been in a continuous EDA roadmapping process with the definition of its annual global R&D programs.

"Europe is ahead in terms of EDA roadmapping. This may be explained by the fact that EDA business remains small in Europe, and also because US companies tend to acquire our startups' accomplishments. It is high time that we change this situation with the advent of new technology approaches such as TSV."

Borel attracted the attention on The European EDA Roadmap 2009, a 352-page document that he and twenty European industry and R&D contributors wrote for the timeframe 2008 to 2013.

In more specific terms, The 2009 European Roadmap for design automation in semiconductor products describes mainly SoC and SiP products, taking the best of technology capabilities for addressing new markets. The 2009 edition mainly focuses on demonstrating a complete top-down design flow, starting at specifications, then system level Design linking designers to formal customer's specification, parametrizable IPs creation, standards and Design for Manufacturability (DfM) supported by new TCAD (Technology CAD) developments.

Published mid-2009, the document is revised and expanded with new ideas, notably CAD linked to Design for Manufacturability (DfM), Systems in a Package (SiP using new technology approaches such as TSV or Through Substrate Vias for 3D stacking), security and reliability (Dependability), every year.

Borel indicated that Chinese contacts called for the translation of the European EDA Roadmap 2009 in their language.

Moving to an international EDA roadmap
According to Borel, it is urgent to follow the basic principle of the ITRS Roadmap to translate EDA priorities and define an international IPs & EDA Roadmap for Products (I2ERP). The European EDA roadmapping experience could help build the framework of the International EDA roadmap "provided that the EDA vendor community is ready to jump in the bandwagon."

At this point of time, he deplored, "there is no discussion between EDA companies and their system level customers. How can a common ESL design solution be developed in that case? There is no chance."

He added: "EDA vendors have always made their offering in their "closed environments". EDA industry CTOs should anticipate needs and share development efforts. This would prevent duplication of work."

Borel highlighted three directions in which costs should be shared.

Firstly, he encouraged to open EDA design solutions in a common true standard environment for tools in line with the new TSV Roadmap, from 2010 to 2015. Secondly, he called for an acceleration of standards introduction for design flow and libraries so that EDA companies and startups can access the required EDA tools and libraries. And, thirdly, Borel promoted the development of new libraries in IP-Xact for TSV in non-silicon technologies.

This represents a "huge amount of work" that can only be achieved through cooperative developments to better and faster serve system customers in these new system design challenges, including hardware and software.

At the end of the program, an overall business efficiency improvement would be generated, Borel concluded.

 

 
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