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> ADVANCED PACKAGING: 3D IC, WLP & TSV
> GlobalFoundries & Qualcomm to collaborate on 28nm & 3D ...
> ADVANCED PACKAGING: 3D IC, WLP & TSV
Mar 3rd, 2010
GlobalFoundries & Qualcomm to collaborate on 28nm & 3D Packaging with TSV technologies
According to a recent article from Semiconductor International, GlobalFoundries added Qualcomm to its customer base, starting with 45 nm wafers and moving to a 28 nm LP process that includes high-k/metal gate technology. Prior to the announcement, John Pellerin, director of technology development at GlobalFoundries, said the gate-first approach to high-k deposition has die size advantages over the gate-last approach supported by rival foundry TSMC.
Jim Clifford, senior vice president and general manager of operations at Qualcomm CDMA Technologies, said Qualcomm "needs access to the industry's most advanced technologies." Qualcomm has developed an Integrated Fabless Manufacturing (IFM) model, which builds "tight technical interfaces" among all parties in the IC development cycle, including Qualcomm's multiple foundry partners. The addition of GlobalFoundries comes at a time when demand for high-end wireless devices is taking off, including mobile systems that operate on the CDMA2000, WCDMA and 4G/LTE cellular standards. Heterogeneous solution with TSVs: The two companies said they "intend to explore other areas to collaborate on, such as die-package interaction and 3D packaging technologies." Pellerin said vertical interconnects could serve wireless markets, which seek to marry a logic-process-based IC with complementary die based in non-logic technologies. Through-silicon vias (TSVs) are not only targeted at mating a logic chip with a memory die, he said. "With TSVs we can really do heterogeneous types of products that can enable high-form-factor, high-function handheld devices. 3-D can gain a lot of leverage in terms of what you can do in a small amount of space," Pellerin said. Sources :
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