The Hybrid Memory Cube Consortium released to its members an initial draft of interface specifications for its 3-D DRAM memory stack. The group is now in final review of the specs with plans to release them publicly near the end of the year.

The group has so far defined two specifications—an interface protocol and a short-reach physical layer channel. The PHY is optimized for use connecting a memory cube and chips sitting multiple inches of printed circuit board traces away in a networking system.

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