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Mar 12th, 2012
Hynix addresses 3D TSV challenges: A closer look
At the recent IMAPS Device Packaging Conference in Ft McDowell AZ Nick Kim , VP of electronic packaging technologies at Hynix, addressed upcoming packaging challenges.
iMicronews thought his presentation was worth A Closer Look.
After 14 years at Samsung , Kim moved to Seoul Semiconductor in 2010 and then Hynix in his current role in 2011.
Hynix has been working on stacked memory with TSV for several years. In 2009 they announced their ability to stack NAND flash, in 2010 their prototypes for LPDDR2 and in 2011 their 16 Gb, 8 chip stacked DRAM.
Looking at the 3 possible bonding options Kim feels that while W2W shows expected advantages in throughput and therefore cost, it cannot compete with C2C or C2W in terms of yield or accuracy. According to Hynix, C2W shows advantages over C2C in terms of throughput, cost and accuracy.
In terms of underfilling Kim sees NCF (non conductive film) resulting in better throughput and reliability than NCP (non conductive paste). Fee expet capillary underfill (CUF) to be a player in 3D becase of the smaller gaps and the very slow throughput without vacuum assistance.
Kim reports that Hynix has also found that ~ 10% thermal vias in their designs will reduce the memory stack temp from ~ 105-110 C down to ~ 93 C.
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