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May 2nd, 2012
IC roadmap remains in flux amid scaling challenges
The technology roadmap for semiconductors remains in flux, as there are more signs that the foundries may accelerate the insertion point for finFET transistors amid next-generation lithography delays.
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Even before finFETs, there are also questions about the 20nm node at the foundries. And at a recent event, various factions debated over which technology will enable future designs. In general, the two main technology candidates are based on bulk CMOS and silicon-on-insulator (SOI). Startup SuVolta Inc. has developed another option. And 2.5D/3D stacked technology provides yet another scaling path.

Causing part of the confusion in the semiconductor roadmap is the exact timing for the insertion point of extreme ultraviolet (EUV) lithography.

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