IPDiA, a leading supplier of silicon passive components and 3D silicon packaging is offering first call to participate to a Through Silicon Via (TSV) Multi Part Wafer (MPW) program also called “pizza mask”

Through Silicon Via technology is known to offer numerous advantages: application and electrical performance benefits with shortest connections between dies for sensitive signals, double side assembly solution resulting in package design simplification and better power supply redistribution, high density packing and financial benefit with a high degree of miniaturization and therefore lower costs.

Thanks to this MPW opportunity, companies which would like to make an evaluation design with Through Vias in Silicon could take advantage of this open proposal and have the product available within a very short leadtime for applications such as:

• interposer with System in Package (SiP)
• Wafer Level Package (WLP)
• Interposer for Submount
• Die stacking for volume constrained applications
• HB LED packaging platform

Leader in 3D etching technology, IPDIA, a French company, has been developing TSV since 2005 with the following key features:

• Through silicon via with low series resistance (< 10 mOhm)
• Interposer with fine pitch (125 µm)
• Low ohmic substrate for silicon interposer / High ohmic substrate for silicon interposer with 3D passive integration
• 2 Cu layers on front side and 1 Cu layer on back side with passivation
• Maximum allowed current / Via: 100 mA

There will be two opportunities to join and share the MPW:
- The first before end February 2010 based on a Silicon Interposer specification (specification available on request)
- The second based on a Silicon Interposer with 3D Passive integration before end May 2010.