The fast growing fabless company says other users could cut time to market by 60% and costs by 30% by using its proprietary fabrication latform. It looks for access to new ideas and new business deals, as well as licensing revenues. deals, as well as licensing revenues.

Who would have thought that the first big push towards a standard MEMS process platform would come from a company whose innovative manufacturing technology has been key to its success? InvenSense has driven its 74% CAGR over the last few years to become the fourth largest consumer MEMS supplier at ~$150 million, according to Yole Développement, thanks in large part to its low cost gyroscopes enabled by its proprietary direct wafer-level eutectic bonding of the MEMS to CMOS die called the Nasiri Fabrication (NF) Platform. Now the company figures it will gain more by offering the technology to other users in the form of a shuttle than by keeping it 100% in house.

“We still see our manufacturing technology as a huge competitive advantage for us, but we’re humble enough to know that we can’t generate all the new ideas. By providing access to our NF Platform, we get a first look at more new ideas which we can either license or acquire,” says Fari Assaderaghi, InvenSense VP of advanced technology development. He notes that InvenSense is especially interested in opportunities in consumer markets and mobile applications, but is more inclined to license its fabrication technology for applications in other markets outside its established business.

The immediate appeal for potential users is jumpstarting time to development of volume manufacturable MEMS devices, by using shared cost shuttle runs of the established InvenSense Nasiri Fabrication process at tier-one CMOS foundries. The company estimates users could cut a typical twenty-month development cycle to proof of concept with a new process platform down to just eight months with the well-established NF Platform. And after proof of concept, the transition should be seamless to volume production on the proven process already qualified at tier-one foundries. InvenSense supplies a PDK for the MEMS, and a PDK for the ASIC from its foundry partners. The MEMS process uses well-characterized single crystal silicon for the mechanical structures. The shuttle includes an InvenSense reference design for monitoring process results. And having the CMOS bonded directly to the MEMS allows wafer level extraction of key mechanical and electrical parameters of the MEMS.

Initial users have primarily been university researchers. The company worked with select local MEMS and IC professors at institutions like U.C. Berkeley and Stanford on the first shuttle run, where resultant devices included an integrated MEMS resonator and a symmetrical-drive gyroscope for a DARPA program that worked on first silicon. Early interest has now expanded to a wider range of universities in the U.S. and abroad and to some small companies, both traditional MEMS players and some in entirely different areas. “Larger companies, some with their own captive fabs, are also showing more interest,” says Assaderaghi. The next two shuttle runs are in process, but openings remain on a fourth run slated for the first half of next year.

 

Diverse applications supported by the NF Platform - extending beyond inertial sensors (courtesy of InvenSense)

But the ultimate advantage, InvenSense argues, will be the smaller size, lower cost, and better performance enabled by connecting the MEMS and ASIC electrically and mechanically in a single step, with the company’s proprietary aluminum germanium eutectic bonding. Biggest beneficiaries of the NF Platform may be those applications that need the most intelligence, for significant calibration, or any close coupling and integration of the signals between the MEMS and the CMOS, as for example multiple sensor integration, says Martin Lim, co-founder and senior director of MEMS R&D, noting how the short interconnects speed transmission and reduce parasitics.

The more demanding automotive and industrial applications could also see direct benefit. “These tend to be $10, 5mm x 5mm devices, where we can dramatically reduce the size and cost,” suggests Lim. InvenSense says the low-cost bonding of the MEMS to the ASIC creates both high quality vacuum encapsulation and sturdy die that can be tested at the wafer level by conventional wafer probing, singulated by conventional sawing, and then packaged as a single die in conventional IC packaging, cutting the expense of MEMS custom packaging and test from the typical 50% of total cost down to 15% to 20%. While InvenSense uses very low cost plastic packages for its consumer devices, higher-performance packaging can of course be used where needed in automotive and industrial applications.

The company suggests there are few limitations to the kinds of MEMS structures that can be etched in its silicon-over-cavity platform. “The process is our own internal sandbox for new products as well,” says Assaderaghi. “And we think the platform is very versatile, analogous to a general purpose CMOS process supporting a broad range of applications.” Some applications may need further processing of the bonded wafers, such as opening a port to the environment, for example, for chemical sensing, optics, microfluidics, or pressure sensors. “We believe that the separate MEMS and CMOS model is obsolete, and that MEMS developers and CMOS foundries will both benefit greatly from this new model,” he adds. “Our additional MEMS steps are few and simple and can be viewed as a value add-on to the standard CMOS process, similar to high-voltage or embedded non-volatile memory modules. The lack of CMOS-MEMS integration is a business challenge for both the small MEMS specific foundries and the IDMs, as it erodes their initial advantage with their captive MEMS only fabs. Attempting to compete with standard CMOS foundries in manufacturing and standard semiconductor backend processes may ultimately challenge even the most established IDM players".