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Mar 18th, 2014
 
Mobile device packaging: a closer look
 
At the recent IMAPS Device Packaging Conference in Ft McDowell AZ, Steve Bezuk, Sr Dir. of Package Engineering for Qualcomm, discussed “Challenges and directions in mobile device packaging”. We, at i-Micronews, thought it deserved … A Closer Look.
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At the recent IMAPS Device Packaging Conference in Ft McDowell AZ, Steve Bezuk, Sr Dir. of Package Engineering for Qualcomm, discussed “Challenges and directions in mobile device packaging”. We, at i-Micronews, thought it deserved … A Closer Look.

They are expecting 20% CAGR for smartphones with 7 billion units shipped between 2012 and 2017.
Qualcomm sees technical challenges coming from materials issues, thermal issues, mechanical issues and electrical issues as shown below.


Technical challenges for mobile applications

Handset thickness continues to be reduced and is now approaching 6mm. Since the battery and the screen are not shrinking chip packaging and the substrate board must make up the difference. This in turn requires ever decreasing package thickness shown in the slide below in comparison to a penny.

Thickness comparison of Qualcomm mobile packages

Most of these packages are FC and WLP. Bezuk commented that 5 years ago very few of the packages were WLP but now this category accounts for near 50% of the packages IC.
Molded FC die on thin core or coreless substrates are approaching 750um thick. Warpage is difficult to control in such thin packages and is dependent on: a)  Substrate core thickness and CTE; b)  Mold thickness over die and c) die thickness (ratio of Si/EMC). Solder balls have become a significant fraction of the total package height.

Typical dimensions for FC CSP

The required tighter pitch bumping ( < 140um) is requiring a move to copper pillar connections to achieve tighter pitch  and thermocompression bonding to overcome warpage/flatness issues to align such tight pitch.
Traditionally mold compound (EMC) thickness is used to control warpage. Thinner EMC above the die results in increased warpage and requires EMC with higher mold shrinkage and higher modulus. 

Using EMC shrinkage to control warpage

Warpage is also dependent of substrate modulus and CTE as shown below in simulation.

Controlling warpage through substrate CTE and modulus (Simulation)

A comparison of typical substrate properties 2008 vs 2014 is shown below.

Substrate manufacturing trends

Reduction in substrate core CTE is no longer an option so the industry is turning to develop materials of increased modulus. 


Substrate core CTE changes in the last 5 years to control warpage

Bezuk proposed that the next move (time undefined) will be from todays FC PoP structures to 2.5/3D moving first to wide IO DRAM on logic and next to logic-on-logic.
Bezuk commented  that  there was no clear infrastructure answer for where interposers will be coming from. Since the solution is not defined today, it certainly will NOT be ready before Moore’s Law runs out of steam.

 

 
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