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May 17th, 2013
Solder filling of TSV: a closer look
One of the acknowledged deterrents to the wide scale adoption of 2.5 and 3D technology has been and continues to be cost. Cost analyses point to TSV formation as a area that needs to reduce cost to make the technology economically viable.
One of the options being put forth is the filling of TSV with solder. Although less electrically conductive than copper the solder filled TSV are a closer CTE match to silicon and may be acceptable for numerous applications. I-Micronews thought this TSV option was worth … “A Closer Look” .
Cu electroplating is widely used as the standard via filling technique. However, via-filling with the Cu electroplating requires a relatively long process time. Reduction in fill time could have a significant impact on total process cost.
In 2011 Ko and co-workers at the Korean Institute of Industrial Technology described the filling of TSV with molten solder. The TSV were lined with Ti/Au (200nm/100nm) deposited by ionized metal plasma sputtering.
Ko examined two TSV fill processes; (1) reflow soldering vacuum filling and (2) wave soldering vacuum filling. In the former, the wafer is coated with solder paste and reflowed (10 minutes) followed by vacuum application ( 0.02 – 0.08 MPa) from the bottom side to draw the molten solder into the TSV (fill time 2-3 sec ) Care must be taken not to draw flux into the TSV and contaminate them.
In method 2 the wafer is dipped into a molten solder bath and vacuum applied to the backside of the wafer is used to suck the solder up into the TSV. Vs method 1, no time is required to melt the solder and since no flux is used there is no contamination of the solder in the TSV. 200 x 30 µm TSV were filled at 0.02 MPa vacuum. Initial results showed that increased vacuum is required to fill TSV with smaller diameters.
SEM X-sect Image of Solder Filled TSV 
Vacuum Filling of TSV with Solder 
In 2011 He and co-workers at the Chinese Academy of Sciences Institute of Microelectronics also addressed the difficulties with Cu electroplating for TSV filling, namely (1) requirement of a Cu seed layer; (2) electroplating time (“often more than 30 min”); (3) Cu CMP required to remove the overburden layer and expose the Cu-filled TSVs [3,4].
Addressing the CTE mismatch between silicon and solder, the He technology uses copper core solder balls to partially fill the TSV. In terms of process flow copper core solder balls are “blown” into the TSV through a stencil (d) followed by a solid solder ball (e). After reflow the TSV is both filled and capped with a solder bump (f). A glass carrier is attached and the wafer is thinned from the backside (g-h) followed by RDL.
TSV Filling with Copper core solder [3,4]
No copper seed layer and no overburden CMP are reportedly required. Experiments were done with 110 µm TSV dia., 100µm copper core solder balls with 80 µm copper core.
Lastly, the USP application “ Formation of TSV in Silicon Substrate” was filed by Sakuma of IBM in Aug of 2012. This uninformative title depicts filling of a TSV in a silicon substrate “without plating or sputtering equipment”. What is claimed is:
“A silicon substrate in which a TSV is formed in a through hole by the method of forming a TSV, the method comprising:
iMicronews expects to see further development of this technology in the future.
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