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Oct 15th, 2012
 
TSMC’s 2.5D Interposer technology with logic and wide IO memory has entered pilot production stage
 
The milestone demonstrates the industry’s system integration trend to achieve increased bandwidth, higher performance and superior energy efficiency by mounting the DRAM directly on the logic chip as a substrate using the Wide I/O interface.
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TSMC’s CoWoS technology provides the front-end manufacturing through chip on wafer bonding process before forming the final component. Along with Wide I/O mobile DRAM, the integrated chips provide optimized system performance and a smaller form factor with significantly improved die-to-die connectivity bandwidth.

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