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Dec 5th, 2011
TSMC gearing up for via-first TSV
While major IC packagers have already devoted resources on TSV (via-last) development, Taiwan Semiconductor Manufacturing Company (TSMC) is also eyeing the market with its front-end process (via-first).
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Speaking at a recent technology forum in Hsinchu, norther Taiwan, TSMC senior VP of R&D Shang-Yi Chiang indicated that the company has developed so-called 2.5D TSV technology with samples currently shipping to clients for their FPGA devices.
TSMC expects to fabricate 2.5D TSV chips in small volume in 2013, with mass production slated for 2014, according to Chiang.

TSMC has also been developing next-generation wafer level integration with 3D TSV technology, said Chiang. But for logic ICs, different die sizes as well as heat dissipation will be the issues to overcome. Chiang does not expect to see 3D TSV adopted in the logic IC segment in the next five years.

However, samples of 3D TSV memory ICs are expected to be introduced in 2013, due to fewer challenges than those faced by logic devices, Chiang noted.

In addition, Chiang urged upstream and downstream players in the semiconductor industry to partner for 3D IC commercialization, creating some kind of ecosystem. Taking TSMC as an example, the company is working with its ecosystem partners including EDA service providers, IP vendors and fabless IC firms allowing it to bring down production costs, concentrate on its expertise and more importantly, contributing to the industry's sustainable development, Chiang pointed out.

Digitimes Research analyst Nobunaga Chai has identified 2.5D IC as a transitional integration technology, and TSMC is more eager to vie for a piece of the 3D TSV pie. Chai also suggested that TSMC should seek some form of strategic alliance with Advanced Semiconductor Engineering (ASE) to jointly grab a considerable share of the 3D TSV market. In fact, the pair's collaboration on R&D should start now, Chai said.

TSMC's 3D TSV technology will be favored by high-precision applications, while ASE is good at boosting productivity, Chai indicated.

ASE is currently the largest global packaging house, and has already been engaging in developing integrated 3D IC solutions. The company said previously commercialized products made using 2.5D and 3D IC technologies would hit the market by 2015.


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