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Dec 5th, 2011
TSMC gearing up for via-first TSV
While major IC packagers have already devoted resources on TSV (via-last) development, Taiwan Semiconductor Manufacturing Company (TSMC) is also eyeing the market with its front-end process (via-first).
Speaking at a recent technology forum in Hsinchu, norther Taiwan, TSMC senior VP of R&D Shang-Yi Chiang indicated that the company has developed so-called 2.5D TSV technology with samples currently shipping to clients for their FPGA devices.
In addition, Chiang urged upstream and downstream players in the semiconductor industry to partner for 3D IC commercialization, creating some kind of ecosystem. Taking TSMC as an example, the company is working with its ecosystem partners including EDA service providers, IP vendors and fabless IC firms allowing it to bring down production costs, concentrate on its expertise and more importantly, contributing to the industry's sustainable development, Chiang pointed out.
TSMC's 3D TSV technology will be favored by high-precision applications, while ASE is good at boosting productivity, Chai indicated.
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