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Jul 12th, 2013
Thermally enhanced pre-applied underfills for 3DIC: a closer look
One of the biggest challenges for future high-performance 3DIC is heat removal from the stacked dies. In a recent presentation at the 2013 IEEE ECTC IBM Japan and Sumitomo 3M gave a presentation examining the use of thermally enhanced pre-applied underfills to address these issues. iMicronews thinks that these new materials are the first reported results of the public announcement in 2011 that IBM and 3M were working to develop thermally enhanced underfills so that they could build 3DIC chip stacks. iMicronews thought it was worth…A Closer Look .
3D devices create higher heat densities due to their small sizes. A challenge for future 3D devices is to accelerate heat transfer within chip stacks. One proposed approach to cool the stacks is improving the thermal conductivity of the underfills used between the dies. Since the standard silica filled capillary type underfills (CU) have poor thermal conductivity (TC), IBM Japan and Sumitomo / 3M (the IBM team) decided to examine the use of better thermally conductive fillers in thermally enhanced underfills.
The high-filler-loadings required for higher TC underfills result in high viscosities which are incompatible with standard capillary underfills and would not work well for 3D devices with narrow gaps and multi-stacked dies. The IBM team therefore focused on pre-applied type thermal conductive underfills.
Wafer-level underfill (WLUF) materials were prepared as: (a) spin coat materials; (b) film-type materials that can be laminated onto a wafer and (c) solvent free hot melt materials, all with the same filler loading. The hot melt type underfills showed the lowest viscosity at process temperatures of 100 – 150 ◦C. They report that “In general, low-viscosity pre-applied underfills result in better solder joints”. The new materials had thermal conductivity of 1.1 W/mK vs the standard capillary underfill with thermal conductivity of 0.4 W/mk. The new pre-applied thermally enhanced underfills containing unidentified higher thermally conductive fillers were also self fluxing to insure good solder joint formation.
Initial results indicat that “the new thermally enhanced, hot melt underfills appeared less reliable than the industry’s standard silica-base underfills” but the IBM team indicates that “ reliability of the materials can be improved by optimizing the material formula” . Although noting that their high TC pre-applied type underfills tend to trap voids, they also noted that “the Stack Joining process” with a pressure cure step could eliminate the voids in the multi-die stack modules”.
Stack joining process
IBM “Stack Joining Process”
In the assembly process, the thermal underfill was applied to each 10-mm die and the dies were aligned sequentially on the silicon substrate at 100°C using a flip chip bonder. At this point, the lead-free solder capped on the Cu pillar is still unmelted. Then, a high temperature (250°C) was applied to form the solder joints. Next the stacked silicon chip was bonded to the laminate using an adhesive with 50µm glass spacers to set the appropriate gap between the silicon substrate and the laminate. Capillary underfill was used to fill the bottom gap, and then cured at 150°C.
IBM test Structure: 4 die stack on interposer on laminate substrate
While this initial data shows promise, this new technology appears to have a ways to go before we can expect commercialization.
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