I-Micronews - View Report InvenSense ITG-3200 –3-Axis Gyroscope Reverse Costing Analysis

MEMS : InvenSense ITG-3200 –3-Axis Gyroscope Reverse Costing Analysis

Get into the secrets of InvenSense ITG-3200 –3-Axis Gyroscope

Price : 2990 €

Publication date : May 2010

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Physical Analysis of the Device
Step by Step Reconstruction of the Process Flow
Cost of Manufacturing and Estimation of Selling Price

Yole Développement publish the reverse costing report of the 3-Axis MEMS Gyroscope ITG-3200 supplied by InvenSense.

The ITG-3200 is the first 3-axis(Pitch-Roll Yaw) gyro developed by InvenSense. It uses a very thin 4x4x0.9mm QFN package. The components are manufactured on 200mm wafers using a three-bonded-wafer process: a thin sensor wafer and a protective cap wafer both processed by Deep RIE, and an ASIC wafer for signal conditioning. The ITG-32003-Axis gyroscopes are suitable for various motion processing solutions for consumer products.

This report provides complete teardown of the MEMS Gyroscope with:

• Detailed photos

• Material analysis

• Schematic assembly description

• Manufacturing Process Flow

• In-depth economical analysis

• Manufacturing cost breakdown

• Selling price estimation Glossary Overview

•     Analyze the cost of projects at the R&D level

•     Enhance the negotiation power of purchasing managers

•     Benchmark competitor’s products

Glossary

Overview/Introduction

• Executive Summary

• Reverse Costing Methodology

InvenSense Company Profile

Physical analysis

• Synthesis of the Physical Analysis

• Physical Analysis Methodology

• Package Characteristics & Markings

• Package Opening & Bonding Number

• Device Structure

• Device Dimensions

• MEMS Sensor –Optical Views

• MEMS Sensor –X-Axis SEM Views

• MEMS Sensor –Y-Axis SEM Views

• MEMS Sensor –Z-Axis SEM Views

• ASIC –Overview

• ASIC –Markings & Bond Pads

• ASIC –Cavities

• ASIC –Delayering

• ASIC –Logic Area & Memory

• Component Cross-Sections

• ASIC Process Characteristics

• MEMS process characteristics

• Comparisons with Previous Generations

Manufacturing Process Flow

• Overview

• ASIC Process Flow (CMOS + Cavity Etch)

• MEMS Process Flow (Cap + Sensor + Assembly)

• Description of the Wafer Fabrication Unit

Cost Analysis

• Synthesis of the Cost Analysis

• Main Steps of Economic Analysis

• Yields Explanation

• Die per wafer & Probe Test

• Front-End Cost –Hypotheses

• ASIC Front-End Cost

• MEMS Front-End Cost

• MEMS Front-End Cost per Process Steps

• MEMS Front-End : Equipment Cost per Family

• MEMS Front-End : Material Cost per Family

• Total Front-End Cost (ASIC + MEMS + Assembly)

• Back-End 0 : Probe Test and Dicing

• Total Wafer Cost (Front-End + Back-End 0)

• Die cost

• Back-End 1 : Packaging Cost

• Back-End 1 : Final Test Cost

• ITG-3200 Component Cost (FE + BE 0 + BE 1)

Estimated Manufacturer Price Analysis

Conclusion

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