New GPU is AMD’s first with Samsung 8-Hi second generation high bandwidth memory and the latest 2.5D chip-on-wafer packaging from SPIL
Two years after the release of the Radeon Fury X, using the world’s first on-chip integrated high bandwidth memory (HBM), at CES 2017AMD presented the Radeon Vega graphics procession unit (GPU), featuring second generation HBM (HBM2). We have analyzed the Radeon Vega Frontier Edition, which can do 13 or 25 trillion floating point operations per second (TFLOPS) depending on the floating point format. The GPU has a 16GB high bandwidth cache, assembled from two 8-Hi HBM2 stacks.In a smaller, 47x47mm 10-layer flip-chip ball grid array (fcBGA) package, the component uses more than 2,800mm² of silicon, an impressive silicon-to-package ratio.
Compared to NVIDIA, which uses only TSMC to manufacture the Pascal GPU, AMD has chosen to use multiple sources to produce the Vega GPU. The GPU die is made by GlobalFoundries with a 14nm FinFET process, giving it 12.5 billion transistors. The interposer, with via-middle through silicon via (TSV) technology, is provided by UMC, which was also the provider for the Radeon Fury X. The 2.5D assembly of the component is done by two sources, with Taiwan’s SPIL estimated to be the main one. It uses SPIL's ‘CoW-last’ Chip-on-Wafer after Through-Silicon Interposer process.
Regarding the HBM2, only two stacks of 8GB are used to obtain the 16GB capacity. As for NVIDIA’s GPUs, Samsung is the provider of the HBM2 stacks, whereas SK-Hynix was the supplier for previous Radeon Fury X. The 8GB HBM2 consists of eight 1GB HBM2 dies and a buffer die at the bottom of the stack, which are all vertically interconnected by TSVs and microbumps.The report includes a complete physical analysis of the packaging process, with details on all technical choices regarding processes, equipment and materials. Also, the complete manufacturing supply chain is described and manufacturing costs are calculated.The report compares the Radeon Vega solution with NVIDIA’s Tesla P100, highlighting the integration choices made by both companies. Also, the report features a comparison with AMD’s Fury X, which uses HBM1 and 2.5D assembly, to explain the interest in evolution through the HBM2 and CoW 2.5D platforms.
Overview / Introduction
Company Profile and Supply Chain
> AMD Radeon Vega Frontier Edition Teardown> Package- View, Dimensions and Marking- Die Sizes> DRAM Die- View, Dimensions and Marking- µBumps & TSVs> Package Cross-Section- Laminate and Frame Cross-Section- Interposer Cross-Section- GPU Cross-Section- 8-Hi HBM2 Stack Cross-Section> Comparison with AMD Fury X including SK-Hynix HBM1> Comparison with NVIDIA Tesla P100 including Samsung 4-Hi HBM2
Manufacturing Process Flow
> Global Overview> GPU Process Description> HBM2 Stack Process Flow> Interposer Process Flow> CoW and Final Assembly Process Flow
> Overview of the Cost Analysis> Yield Hypotheses> GPU Front-End and Die Cost> Interposer Wafer and Die Cost> DRAM Front-End Cost- TSV Manufacturing Cost- Micro-Bumping Manufacturing Cost> DRAM Die Cost> Logic Die Cost> 8-Hi HBM Stack Cost> CoW Assembly Manufacturing Cost> Final Component Cost
Estimated Price Analysis
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Detailed photos and cross-sections
Manufacturing process flow
Supply chain evaluation
Manufacturing cost analysis
Estimated sales price
Comparison with NVIDIA Tesla and TSMC CoWoS