Higher performance SoC (CPU, GPU, FPGA, ASIC), chiplets and High Bandwidth Memory (HBM) have been introduced to high performance computing for the raising AI, machine learning and deep learning applications. This brings big challenges to package technology, such as higher power consumption, larger die size and lager package size, better electrical SI/PI, higher density connection, etc. This is also driving various package evolution from structure, process, materials and even design methodology. This presentation will discuss Amkor’s high-performance package solutions, including single chip FCBGA, multi-chip module FCBGA, HDFO (High Density Fan-Out) and 2.5D Heterogeneous packages for the coming era of AI.

With evolution of communication technology, 5G development and implementation is driving the deep integration of AI, HPC, and IIoT. The nature of this integration is pushing for high bandwidth and low latency for faster computing / analysis and shorter communication / feedback cycle . The major package platform for HPC in cloud / datacenter and edge computing is fundamentally fcBGA. It is being driving towards even larger package size, finer pitch, and better thermal management in heterogeneous integration to cope with Si node progress driven by Moore’s Law and its associated higher power density. In this presentation, below aspects are discussed.
– Flip Chip Markets & Applications
– fcBGA package structure and size
– fcBGA process flow
– fcBGA thermal management
– Advance in fcBGA and its trend

Since 5G network age is coming, 5G application totally redefine router / switch technology development, especially for the enterprise level of router / switch, which requires the wider bandwidth to proceed the larger transmission signal. It is forecasting that the bandwidth requirement would enhance to 25.6T,and even over 50T. The homo / hetero integration package technology would support the advanced router / switch development. Despite of 2.5D and 3D package to apply in, FO-MCM technology with chip last assembly and more dies integration in one package would be the critical package type for quality and cost benefit to promote the transmission devices and earn the more advantages

While Moore’s Law is hitting its limitation both physically and from an economics standpoint, the semiconductor industry turns to advanced packaging technologies to increase performance and integration while lowering costs.

Brewer Science was one of the first companies to consider temporary wafer bonding as an enabling technology for ultrathin wafer handling. Nowadays, temporary bonding is not only used for wafer thinning and backside wafer processing at high temperatures and high vacuum levels, but also for handling of new types of packaging substrates such as reconstituted wafers and panels that easily deform under thermal stress. We understand that it is impractical, if not impossible, to cover the entire range of market needs with one material set or type. Therefore, we have adopted a portfolio approach to material development and utilize many different platforms to address the needs of this fast-paced market.

This presentation will illustrate a novel dual-layer approach. Our dual-layer materials combine a thin thermoplastic bonding material and a thick thermoset bonding layer, which prevent material flow at high temperatures after curing. When designing the dual-layer bonding system, careful attention was placed on material performance for very high-temperature, high-stress applications, while also considering very thin wafer (20 µm and below) handling. There are 2 layers in the system to allow more room to tailor the material properties to target enhanced performance. For example, the thermoplastic layer was designed to obtain a conformal coating with good adhesion to the device as well as the curable layer. The thermoset material was carefully designed to obtain target thickness, bonding, and curing conditions. Combining these two layers, the dual-layer bonding system provides enhanced mechanical and thermal properties.

The dual-layer bonding system was developed to aid thin wafer handling (TWH) processes within multiple market segments including: III-V compound semi, power, 3DIC, memory, eWLB, MEMS, and other FOWLP segments – all of which have stringent requirements with respect to adhesion, low total thickness variation (TTV), temperature stability, performance, and form factor. The advantages of the dual-layer bonding system include increased throughput, ease of cleaning after processing and the thinning to sub-20 µm with good uniformity.

Transistor scaling has historically been the primary driver of Moore’s Law. However, as the cadence of traditional front end scaling has slowed and the returns have diminished, the semiconductor industry has increased focus on the deployment of innovative packaging solutions. 3DIC integration by stacking die using TSVs (Through Silicon Vias) is one of the major technology platforms being adopted to achieve system-level PPAC (Power, Performance, Area, Cost) objectives. 3DIC has already been utilized for stacked DRAM in HMC and HBM applications. Now, the semiconductor industry is turning to 3DIC with increased interconnect density for memory-on-memory, memory-on-logic, and logic-on-logic. Hybrid bonding is being developed as an alternative to thermo-compression bonding with microbumps. As 3DIC processes move into these applications with higher-density interconnects and with hybrid bonding, inspection and metrology solutions must address TSV scaling and quality control requirements to enable manufacturers to achieve yield ramp objectives. KLA has developed new inspection and metrology technologies to provide the industry with high sensitivity, high resolution, high accuracy solutions for process control in increasingly advanced 3DIC applications.

5G has become the center of many hot topics such as IoT, A.I, VR, big data, Autonomous vehicle, Smart City, … The era of 5G will be a remarkable era. The nature of 5G speed requires much denser base station and higher signal strength, resulting in much higher investment than 2G/3G/4G in infrastructure. Therefore it will bring many opportunities to semiconductor packaging and electronics assembly. This presentation will focus on the opportunities of advanced packaging solutions of semiconductor packaging. 5G requires higher integration, plus short signal route. Advanced packaging solutions, especially embedded component packaging (ECP), match with this requirement quite well. As a leading provider of semiconductor packaging and electronic assembly solutions, Kulicke and Soffa (NASDAQ: KLIC) has matured solutions to ECP applications. The main considerations in ECP applications, such as accuracy, fiducial reading, placement force, and the adoption of 008004 … will be discussed.

The first release of 5G standard, 3GPP R15, is finalized in time in June 2018. Since then, the whole wireless communication industry started counting down to the commercialization of the 5G. The achievements from different segments of the industry chain, chips, terminals, demos of equipment vendors, field trial of the operators, etc., hit the media timely and more and more frequently. In the other hand, there does exist “anti” voices that doubted the benefits, ambitious aims, aggressive commercialization plan, etc. of 5G.
This talk will share with the audience a latest collection of 5G progress from various aspects, as well as the observed challenges on the way ahead.

While IoT solutions deployment surge continuously across diverse business sectors with a wide range of services, new emerging technologies are paving innovative approaches to make IoT implementation more efficient and effective. The huge amount of complex raw data produced by IoT devices is driving the trend towards decentralization of data. Advanced approaches are shifting data processing and analytics, and even some level of decision making to the point of origin – the so called IoT edge. Bin Fu takes a closer look at how smarter sensors can contribute to that trend, from the perspective of a sensor solution innovator.

Both the software/hardware for AI/IoT applications are contributing to our ever increasing demand of performance and capability for future life in smart home, city, factory, … etc. Interestingly, by utilizing the AI/IoT capability, development of ICs for AI/IoT applications are also being accelerated and revolutionized toward concurrent design, co-optimization in technology, manufacturing with full automation and big-data analysis, and advanced packaging for 3D heterogeneous integration.

This presentation will provide a broad overview of the Smart MEMS Sensors for Internet of Things (IOT) within the TDK-InvenSense portfolio along with the discussion of emerging applications. We will discuss how these sensors are driving new use cases & trends for developing new package architectures for MEMS applications. The implications of these trends like sensor fusion & integration approach to combine multiple sensors in single package; the trend towards further miniaturization as well new use cases like water proof package technologies etc. will be reviewed in the context of developing new materials & processes as well as managing trade-offs to meet package performance, quality & cost goals.

Ubiquitous display means display will be everywhere in the future life. During this golden age of display technology, the flexible AMOLED technology will face plenty of opportunities and difficult challenges at the same time. Microled may be another potential candidate for the future display technology.