IMAPS 2021 International Symposium on Microelectronics

Tradeshows & Conferences

Online / San Diego

The 54th International Symposium on Microelectronics is being organized by the International Microelectronics Assembly and Packaging Society (IMAPS). The Symposium will feature 5 technical tracks, plus our Interactive Poster Session, that span the three days of sessions with emphasis on packaging technologies that serve 5G, High Performance Computations, Automotive, Industrial, Defense/Space, and Medical electronics markets.

Yole Développement will participate in the following:

Advanced packaging is the future of semiconductor industry! 

Jean-Christophe Eloy, CEO & President, Yole Développement
October 14, 5PM15 CEST – 8AM15 PDT

Although Moore’s Law has remained alive for over five decades, it is no longer cost-efficient. When it comes to advanced lithographic nodes, lesser manufacturers can keep up. Now there are only three leading-edge players, Intel, Samsung and TSMC. The industry is now diligently using advanced packaging technologies to put multiple advanced and/or mature chips in a single package. Together with 3D packaging this extends Moore’s Law at system-level. Times have changed. The industry is seeking alternatives to design and manufacture the latest Systems on Chips (SoCs) using System in Package (SiP) and chiplet-based approaches by leveraging on Advanced Packaging technology. The total IC packaging market was worth $68B in 2020. Advanced Packaging (AP) was worth $30B and is expected to grow at CAGR2020-2026 of 7.7% to reach $47.5B in 2026. At the same time, traditional packaging market will grow at CAGR2020-2026 of 4.3% and total packaging market will grow at CAGR2020-2026 of 5.9% to $47.9B and $95.4B, respectively. Compared to traditional packaging which will grow at 3.2% CAGR2014-2026, AP  will grow more than 2 times quicker, with its CAGR2014-2026 of 7.4%. Two Advanced Packaging roadmaps are foreseen – scaling (going to sub10 nm nodes) and functional (staying above 20nm nodes). Both roadmaps hold more multi-die heterogeneous integration (SiP) and higher levels of package customization in the future. 3 competitive areas are present and will continue to develop – PCB vs. substrate, substrate vs. fan-out, fan-out vs. 2.5D/3D. The main innovations in Advanced Packaging are: decreasing Cu pillar pitch; RDL/substrate development for L/S <10 um (thin film RDL, SAP, Cu damascene RDL and hybrids bonding thereof); further TSV integration (2.5D/3D and MEMS/CIS).

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