NEPCON China 2021 (The 30th Presentation of NEPCON Microelectronics China 2021) will open from 21st to 23rd April, 2021 at the Shanghai World Expo Exhibition & Convention Centre. As a grand international gala for the electronics manufacturing industry, this upcoming exhibition will focus on showcasing equipment and technology in SMT, soldering and adhesive dispensing, testing and measurement, new electronics materials, and other related fields.
The upcoming exhibition will attract some 700 exhibiting firms and brands to showcase cutting-edge products and innovative solutions to an expected influx of over 50,000 professional visitors coming from fast-growth sectors and fields such as consumer electronics, as well as 5G, telecommunication, smart home, IoT, automotive electronics, medtronics, semiconductor packaging, and digital manufacturing.
Yole Développement will participate to the following:
April 22, 2021 – 14:00-14:30 SGT
Favier Shoo, Team Lead Analyst, Packaging in Semiconductor, Memory & Computing Division, Yole Développement
Abstract : Moore’s law has guided the global semiconductor industry for past decades (since 1965), improving both performance and cost through node scaling.
Traditionally, the IC industry relied on traditional chip scaling and innovative architectures for new devices. In chip scaling, the idea is to pack more transistors on a monolithic die or system-on-a-chip (SoC) at each process node, enabling faster chips with a lower cost per transistor. But traditional chip scaling is becoming more difficult and expensive at each node.
While scaling remains a work-in-progress in the background, the industry is now diligently utilizing Advanced Packaging technologies to put multiple advanced and/or matured chips in a single package, also known as heterogeneous integration -3D/2.5D packaging – to extend 3D interconnect density.
Coupled with Advanced Packaging, system-level 3D interconnect density (3D ID) trend is not only sustained but accelerates to new heights. Such is the value of Semiconductor Packaging.
This has provided an opportunity for giants like TSMC, Intel & Samsung to flex their muscles in semiconductor packaging segment, and these players have emerged as the key innovators of new Advanced Packaging technology. Because of the high resource requirement (cost & skill), innovation in the Advanced Packaging space is observed to be be led by these big players instead of OSATs. For example, TSMC has emerged as undisputed leader in the high-end FOWLP and 2.5D/3D packaging segment using Silicon as the new motherboard for integration. In this presentation session, Favier will present the market and technology trends of Semiconductor Packaging. How players of different business models are entering Advanced Packaging segment will also be covered.