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IWLPC – International Wafer-Level Packaging Conference
From Tuesday 24 October 2017
To Thursday 26 October 2017

IWLPC 2017 SMTA and Chip Scale Review are pleased to announce the 14th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.

Interconnecting Wafer-Level packaging, 3D packaging, Advanced Manufacturing and Test, the International Wafer-Level Packaging Conference (IWLPC) is at the forefront of the packaging technology evolution; it is one of the premier industry conferences. The Wafer-Level Packaging (WLP) track features sessions on materials, processes, design, and new technology like Fan-Out WLP. The 3D Packaging track features sessions on Heterogeneous Integration Enablement, materials and equipmeny, processing technologies, and Smart System Integration and Applications. The Advanced manufacturing track features sessions on test, productivity, inspection, and metrology.

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Attend the presentation of System Plus Consulting on:

"Technology Trends for Sensors using WLP and 3D TSV Integration" in Session 11 on October 25 from 2:15PM to 2:45PM - (Pine) 
by Romain Fraux, System Plus Consulting's CTO

Our experts will welcome you onsite - Ask for a This email address is being protected from spambots. You need JavaScript enabled to view it. !

 

Location San Jose, USA
September 2017
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