NAND Flash originally hit the market in 1991 with a 4Mb product by Toshiba, and after 30 years of prosperous life NAND has become a ubiquitous non-volatile memory technology with Tb-class density and annual revenues over $55 billion (2020). In the last 5 years, the adoption of NAND has been dramatically accelerated by extraordinary advances its underlying manufacturing processes, which have enabled a major technological transition from planar 2D to 3D architectures and continuous scaling through vertical stacking of memory cells.
To sustain the relentless growth of the 3D NAND business, ad hoc manufacturing materials and equipment are needed to address complex technical challenges, as discussed in Yole Développement’s recent report “Equipment and Materials for 3D NAND Manufacturing 2020”.
Etching tools must drill deep channel holes from the top of the device to the bottom substrate. Deposition tools must produce high-quality defect-free thin films with nanometer thicknesses. Metrology/Inspection tools are also becoming essential to monitor the processes and maintain high yields. Ideally, these challenging tasks need to be accomplished in the fastest possible time and lowest cost. In this framework, the competition among equipment suppliers to deliver the best solutions is growing fierce.
A great deal of R&D effort has also been focused on finding new material solutions. For instance, new hard mask materials with high selectivity like metal-doped carbides are currently being intensively investigated. So too are new metals for contact lines, alternative precursors for tungsten deposition, new channel materials to avoid charge mobility degradation, and more.
Several material suppliers are involved in the 3D NAND business and offer material solutions to challenging manufacturing steps, such as dielectric stack deposition or high aspect ratio (HAR) etching. Entegris is at the for forefront in the development of new material solutions for 3D NAND manufacturing, enabling continuous scaling of vertically stacked memory architectures.
Yole Développement’s Senior Technology & Market Analyst, Simone Bertolazzi talked with Mark Puttock, advanced technology engagements, in the CTO office at Entegris, about the company’s material solutions for 3D NAND, strategy, and market status and applications. Discover the details of their discussion below.
Could you briefly introduce yourself and Entegris’ activities in the field of 3D NAND to our readers?
Mark Puttock (MP): I’m Mark Puttock, Sr. Director, advanced technology engagements, in the CTO office at Entegris. Entegris develops and supplies a multitude of pure specialized chemistries, components, filters, and purifiers for the infrastructure and all process areas in semiconductor fabs. One role of the CTO office is to understand and explain internally current and future device challenges to aid timely and effectively new product development. In the case of NAND, the transition from 2D to 3D presented several new challenges in a competitive and fast-moving environment. As the number of cell layers increases, new opportunities for materials and component suppliers such as Entegris continue to emerge. We are addressing those challenges with a comprehensive portfolio of solutions including: formulated chemistries for wet etch, CMP slurries, post CMP cleans, ALD precursors for metal and dielectric layers, specialty gases, advanced filtration and purification for all critical processes, advanced process chamber coatings, microenvironments (FOUPs and others) for wafer transport, and clean fluid handling and storage.
From a material supplier perspective, what are the biggest opportunities and challenges in the NAND market?
MP: With such high aspect ratios (HAR) and massive array structures, the process windows are critical for selective wet etch of SiN, recess metal gate etch, ALD deposition of cell layers, ALD of gate metal, and specific treatments related to aC hard mask for HAR hole etching. For memory cell materials, the high sensitivity to the presence of metallic contamination, the origin of which can be precursor lines and vessels, is the biggest challenge.
Do you foresee any critical barrier – technical and/or economical – to the continuous increase of memory-cell layers in 3D NAND devices?
MP: Yes. Examples include: Long channel layer causing lower overall conductivity. Finding modified or new materials to improve the channel conductivity is not easy. SiN charge trap layer material quality will need improvement. Filling of very HAR holes and slots with adequate SiO2 film quality will require additional development.
What are nowadays the key technical challenges that need to be addressed to keep scaling 3D NAND?
MP: HAR dry etch for channel hole remains one of the most critical steps. Classical dry etch chemistries are used to their limits, and perhaps gains in process margin can be made with more novel approaches, i.e., new chemistries or the incorporation of deposition aiding sidewall control. New dry etch tools seem to focus on uniformity, process control, and maintainability optimizations. Improvements in dry etch and/or amorphous carbon hard mask erosion rates and flatness are continuously sought.
Besides HAR etching and thin-film deposition equipment, are there other key enablers to advance 3D NAND technologies? What is the role of materials versus equipment?
MP: Selective SiN removal. Process window constraints may make this difficult to continue in batch systems and could force changes to single wafer tools. In this case, the bulk etch rate requirement will be greatly increased, which is not easy to do while maintaining selectivity.
Which type of materials need to be optimized or replaced? Is there need for new CVD/ALD precursors or chemical etchants?
MP: Gate metal scheme will change to meet shorter pitch scaling; hence, new precursors are required for W alternatives. Filling of HAR slots and holes would benefit from higher quality films – this may be solved with better Si- precursors.
What are the Entegris’ material solutions for next-generation 3D NAND?
MP: Our products include the following:
- Mo solid precursor and bulk delivery system
- Mo wet recess etch
- All manner of post CMP cleans and cleans
- AlCl3 precursors and solid delivery for cleaner AlO cell layer
- New Si precursors for better film quality and step coverage
- High quality PVD/ALD based protective films for dry etch chamber parts
In a competitive landscape with giant material suppliers (e.g. Merck, Air Liquide, and Dow), what is the position and business strategy of Entegris?
MP: Entegris provides technically differentiated products and typically avoids commodity products. High focus on enabling materials with high purity preparation and delivery to the user. Examples are efficient solids precursor and formulated chemistries with designed-in high purity containers, handling filtration, and purification.
Do you see any new potential market being initiated by future material requirements for 3D NAND manufacturing?
MP: If the channel material is changed, this may generate a new market. The material path is not clear here. We see purity improvements as a continuous requirement. Potentially, the cell design may change to ferroelectric based, in which case Hf or other based films will be required. It is unclear if this will be a simple transfer of Hf film knowhow from logic or if there will be new challenges in NAND geometries.
How is the COVID-19 pandemic impacting semiconductor-material suppliers’ activities?
MP: A halt to global travel has resulted in fewer customer visits for technology exchange. We have had to adapt like all companies to utilizing our local teams and virtual meetings. Business levels are at all-time highs due to increasing demand.
Do you want to say a few conclusive words to our i-Micronews readers?
MP: We believe material and purity challenges will continue to provide companies such as Entegris a great deal of opportunities in 3D NAND.
Mark Puttock is a Sr. Director, advanced technology engagements, in the CTO office at Entegris. By understanding technology trends, Mark contributes to Entegris’ many new product development teams to develop timely and differentiated materials and components. Mark gained his education in physics and PhD in Dry Etching and damage assessment of III-V materials from Cardiff University UK and has worked in the semiconductor industry for more than 30 years.
Simone Bertolazzi, PhD is a Technology & Market analyst at Yole Développement (Yole) working with the Semiconductor & Software division. He is member of the Yole’s memory team and he contributes on a day-to-day basis to the analysis of memory technologies, their related materials and fabrication processes. Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland), where he developed novel flash memory cells based on heterostructures of two-dimensional materials and high-κ dielectrics.
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