“2.5D and 3D stacking technologies are the only solution that meet the required performance of applications like AI and datacenter as for today”, confirms Mario Ibrahim, Technology & Market Analyst from Yole Développement (Yole). Stacking technologies are used in a variety of hardware, including 3D stacked memory, GPU , FPGA , and CIS , are intended for the high/mid and low-end market segments.
Hardware like HBM and CIS comprise the majority of TSV’s revenue. The overall stacking technologies market will exceed US$5.5 billion in 2023 with a CAGR of 27%, announces Yole it its latest advanced packaging report, 2.5D / 3D TSV & Wafer Level Stacking: Technology & Market Updates report. As for today, the consumer market is the biggest contributor, with over 65% market share. But this, paradoxically, doesn’t mean that consumer is the driver for these technologies. In reality, HPC is the real driver for stacking technologies and will exhibit the fastest growth up to 2023, with market share doubling from 20% in 2018 to 40% in 2023. In terms of packaging revenue, this equates to a more than 6x increase from 2018’s revenue. Consequently, the consumer market’s share will decrease. Other markets like automotive, medical, and industrial will maintain their current market share.
Yole and System Plus Consulting, both part of Yole Group of Companies propose today two dedicated reports that explore the 2.5D heterogeneous and 3D wafer-level stacking technologies. The 2.5D / 3D TSV & Wafer-Level Stacking: Technology & Market Updates report from Yole outlines three stacking technologies, TSV, 3D SoC , and hybrid bonding and provides a comprehensive overview of the different market segments including industry trends, market forecasts and technology trends.
In parallel, under its Intel’s EMIB report, System Plus Consulting dives deeply into Intel’s integration know-how with the world’s first on-package CPU and GPU with high bandwidth memory… Full article
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