Intel gave further details on its technique for embedding spin-transfer torque (STT)-MRAM into devices using its 22-nm FinFET process, pronouncing the technology ready for high-volume manufacturing. Embedded MRAM is considered a promising technology for applications such as internet of things (IoT) devices.
In a paper presented at the International Solid-State Circuits Conference here, Intel said that it has used a “write-verify-write” scheme and a two-stage current sensing technique to create 7-Mb perpendicular STT-MRAM arrays in its 22FFL FinFET process. The company had provided early details of its success in developing the first FinFET-based MRAM devices last year at the International Electron Devices Meeting.
The embedded MRAM technology achieves 10-year retention at 200°C and endurance of more than 106 switching cycles, said Ligiong Wei, an Intel engineer who presented the paper
The arrays have demonstrated write endurance of more than 1E06 cycles and read disturb error rate of more than 1E12 cycles, Wei said.
In addition to high endurance, the 22-nm embedded MRAM technology boasts robust yields, with a bit yield rate of greater than 99.9%, according to Wei. However, manufacturing the devices requires error-correction code bits, increasing the size and power budget of the design, Wei said.
MRAM — which is a non-volatile memory technology — is considered a promising long-term candidate to replace memory chip stalwarts DRAM and NAND flash, which face major scaling challenges as the industry moves to smaller nodes. But MRAM is also appealing as an embedded technology replacement for flash and embedded SRAM because of its fast read/write times, high endurance, and strong retention.
Globalfoundries has been offering embedded MRAM on its 22FDX 22-nm FD-SOI process since 2017, but it is not known if any customers are using the technology in commercial products currently shipping.
Analysts believe that Intel is already using its embedded MRAM technology in currently shipping products for foundry customers.
According to Intel’s ISSCC paper, each 0.0486-µm2 transistor to one magnetic tunnel junction (1T1MTJ) MRAM bit cell is 216 × 225 nm2, with two polysilicon word lines. The tunnel-magneto-resistance ratio of the MTJs is 180% at 25°C, with a target device-critical dimension between 60 nm and 80 nm.
Wei said that the eMRAM design is also tolerant of wide variations in supply voltage. The design achieves a 4-ns read sensing time at 0.9 V but is also capable of 8-ns read sensing time at 0.8 V, she said.
In a separate ISSCC paper presented, Intel also described the development of resistive RAM (ReRAM) as a low-cost option for embedded non-volatile memory for SoCs used in IoT and automotive. The embedded ReRAM technology — also implemented in a 22-nm FinFET process — demonstrate what the company says is the smallest and highest-density ReRAM subarray and material innovations to allow low-voltage switching without impact to transistor reliability.