Driven by rising demand for thinner wafers and stronger die, dicing technology is evolving. According to Yole Développement in its Thin Wafer Processing & Dicing Equipment Market report, the dicing equipment market reached more than US$100 million in 2015 and will double by 2020-2021.
Indeed, thin wafers are creating new challenges of significant interest in the dicing equipment industry such as die breakage, chipping, low die strength, handling issues and dicing damage…
Today, the most common dicing technology applied across memory, logic, MEMS, RFID and power devices is mechanical dicing, also known as blade dicing. However, companies are showing a growing need for thinner wafers and smaller devices in general and Yole sees a trend towards adopting alternative dicing technologies. These include stealth dicing and plasma dicing based on deep reactive ion etching technology.
Yole Développement had the opportunity to discuss with Richard Barnett, Etch Product Manager at SPTS Technologies (an Orbotech company) about their products, position in the industry and vision of the market.
Yole Développement (YD): Can you introduce SPTS/Orbotech’s product line, its history and current activity?
Richard Barnett (RB): SPTS Technologies designs, manufactures and supplies industry leading etch, PVD, CVD and inkjet process solutions to the global semiconductor and microelectronics industry. We were formed in 2009 but our history goes back more than 40 years starting with Electrotech and then Trikon Technologies, STS and Aviza Technology. In August 2014, we were acquired by Orbotech and operate as their Semiconductor Device business.
We supply our wafer processing equipment and technologies to the world’s leading semiconductor and microelectronic device manufacturers and research institutions, including the top 5 OSATS for TSV, UBM, RDL and Fan-out, 27 of the top 30 MEMS manufacturers, all 20 MEMS foundries, and many of the top 10 power and RF device manufacturers. We have dedicated local sales and customer support for our global installed base through our international offices.
YD: Which market(s) mainly drive(s) SPTS/Orbotech’s revenue today?
RB: SPTS has a diverse set of end markets, supporting Advanced Packaging, MEMS, Power, RF & LED.
This is a positive for us as everyone in our industry knows markets are cyclical, and so we can typically ride out downturns in some of our markets as the others take over.
At the moment Advanced Packaging is a big driver as the adoption of fan-out wafer level packaging (FO-WLP) ramps up and the long gestation of plasma dicing is beginning to pay dividends too. But that is not to say the other markets are not making their contributions known. Power and RF are doing well on the back of the mobile and wearables sectors and we see positive trends for both MEMS and LEDs.
YD: As one of the leading suppliers for plasma dicing, can you explain how SPTS is positioned in the Semiconductor sector?
RB: Plasma dicing fits extremely well into the volume markets that SPTS already occupies. Plasma Dicing is an exciting new application for deep reactive ion etch (DRIE), also known as the “Bosch” process, the ubiquitous process technology first developed for MEMS manufacturing and then enabling for 3D IC TSVs. SPTS is the #1 supplier of DRIE equipment to the MEMS and Advanced Packaging markets. Our corporate and product history is entwined with the development of the Bosch process and its success in driving the proliferation of MEMS and sensors into the thriving business we see today. For plasma dicing, our expertise is more than just the process know-how, it’s in the hardware and control aspects which are vital to achieving successful singulation using this technique. SPTS is uniquely placed as a vendor able to supply as near “out of the box” production proven capability to this exciting application and do so with an extensive, direct network of field support.
YD: What are the competitive advantages of your products?
RB: As market leader for silicon DRIE applications across the MEMS and Advanced Packaging sectors, we have been able to bring our extensive experience in terms of process development and process control to bear on the die singulation market. SPTS DRIE has been used across the entire range of micromachining from high rate (>30µm/min) processing, to high aspect ratios (>90:1) and many more including low tilt, smooth sidewalls and SOI.
However when it comes to dicing, there are new challenges, particularly for dice after grind (DAG). We are dealing with a very different substrate with the wafer, tape, adhesive and frame inside the process chamber.
Key to the successful transition of DRIE to dicing wafers has been the level of control with respect to the preservation of the whole substrate. Managing high rate processing whilst maintaining low substrate temperatures, ensuring the protection of the exposed tapes or backside metals as the etch approaches completion are amongst some of the newer challenges for DRIE in this application. SPTS has created a portfolio of process and substrate control solutions that ensures successful die singulation on a repeatable and consistent basis. Our Claritas™ end-point detection system is sensitive enough to provide strong signal response with open areas below 0.05%, and as the die and dicing lanes get smaller, the element of end-point and over-etch control will become more critical. Accurate identification of when the etch front has reached the tape allows us to transition to a gentle over-etch condition and prevents the etch penetrating to the underside of the die. Uncontrolled over-etch has been shown to reduce the strength of the die. Our standard DRIE process window has proven to deliver >2x die strength gain when compared with traditional singulation methods. High etch rates deliver throughput advantages, fundamental to providing the low cost-of-ownership necessary to make this technology attractive. Finally, even though the hardware and processes are often new to the backend community, they are able to benefit from our considerable experience of delivering DRIE solutions to leading MEMS and advanced packaging companies.
YD: You are today very well established the semiconductor market, your positioning is quite unique in this industry. What do you think about the dicing market? Current trends? What are the technology trends for the dicing process in the coming years?
RB: Dicing has been around as long as we have had integrated circuits and will be a necessary requirement whilst devices are manufactured using wafers or similar substrates. Blade transitioned to LASER ablation and then stealth, but with the introduction of plasma we are about to embark on the most wide-ranging change that the backend arena has seen for some time. As with any major change, plasma is going to take a bit more time to establish itself. Over the next 1-3 years, I expect to see a steady rise in the adoption and installation of plasma dicing lines across IDMs, foundries and OSATs. But once integration is established from a design perspective, from the layout stage, I would expect to see plasma taking a substantial percentage of the dicing market beyond this timescale. As devices become smaller, wafers thinner and die quality becoming a differentiator the unique benefits of plasma will be needed across a wider range of products.
In the meantime, existing techniques will continue to be used as long as their performance remains satisfactory to the manufacturers. Blade and LASER have lasted this long, through modifications and improvements, and it is clear that they will remain the major portion of the dicing capital market over the medium term.
I have recently attended the Be-Flexible Forum at Fraunhofer EMFT and saw a great number of potential applications where small, thin die can be combined with printed, flexible electronic structures. One of the speakers claimed that plasma dicing would be a must to ensure the standard of chip quality was available to make this happen.
YD: Do you think you could be challenged by your competitors in these fields?
RB: Of course. It would be naïve for me to ignore any of the competing vendors. And this does not just include plasma competitors. The LASER and blade guys will want to keep the new technology at bay for as long as possible. Whether there is technology developments coming to do this, or it becomes a commercial play, time will tell. However, with all of the attributes of the product and organisation, I am certain that SPTS can do well in this sector.
YD: What are the next steps of SPTS/Orbotech growth in the Power, MEMS, Memory & logic, RFID industry?
RB: A full answer to that question would fill many pages, but in brief:
o Power: We’ll see more power production on 300mm Si, as well as new substrate materials such as SiC and GaN. Power semiconductors are strategically important to the global economy, being central to the efficiency of renewable energy farms, industrial motors, automotives and domestic appliances. National level directives on energy consumption create demand for more efficient power management.
o MEMS: New demands for piezoelectric MEMS are occupying more and more of our demo schedule. First appearing for microphones and fingerprint sensors, these use piezoelectric materials such as AlN and ScAlN to generate a signal as the layers are strained by an external force (eg a sound wave, or an ultrasonic reflection). PiezoMEMS consume very little power so are attractive for wearables, as well as being highly durable and largely impervious to moisture or dust. As leaders in piezo processing from our RF activities, we are well placed to serve this market for deposition and etching of these layers.
That doesn’t mean development has slowed in the traditional Si MEMS markets, far from it. New demands for highly accurate inertial sensors are driving development of low tilt structures in silicon.
o RF: This market is mainly driven by smartphones, and the RF content in a phone increases at a far greater rate than actual phone sales. A modern worldphone may need to serve as many as 75 different RF bands, which all need to be read without call overlap, and amplified with GaAs PA’s. The move to 5G after 2020 will produce another wave of RF complexity. Increasing wafer sizes, and new piezoelectric materials to deposit and etch will keep us very occupied.
o Advanced Packaging: The move to wafer level packaging continues at a very high rate and touches all of the main platforms; fan-in, flip-chip, 3D TSV and fastest growing of them all, fan-out. This trend will continue; there was something like 38 individual wafer level packages in the iPhone 7. The OSATS will drive to put more die inside the same package, further growing the WLP market. Our parent company Orbotech is finding that its PCB technology has applications in advanced packaging such as inkjet for package marking and printing underfill dams, and the formation of large vias by laser.
YD: Internet of Things are gaining strong interest today and is expected to grow in coming years. Many discussions are taking place today regarding the technologies supporting the growth of IoT. How does SPTS/Orbotech see the integration of technologies in the IoT market?
RB: IoT is everywhere. I would say it already has strong interest and wide-spread adoption. Every component in the IoT landscape will need the types of devices that our customers manufacture. Every sensor, display, communication device will need to work in harmony, either as part of a collaborative or fully integrated system. Standards and interoperability will play a key role in the rate of proliferation of IoT. These choices will determine how growth in MEMS, RF, Advanced Packaging, LEDs and power happens and in what ratios.
YD: What is the status of SPTS/Orbotech in the IoT business?
RB: As I said previously, we are incredibly embedded within IoT by virtue of our customer base and product portfolio. We say that virtually every electronic device in the world is produced using Orbotech systems because they go through our equipment at one time or another. This includes devices, PCBs and the display panels. You cannot get more embedded than that.
YD: According to you, what new future applications and promising markets can change the industry landscape and the positions of the leading dicing equipment manufacturers in the applications mentioned above?
RB: I mentioned flexible electronics earlier and this will, along with stacking, push forward the trend towards thinner, smaller die. In this arena, plasma dicing, I believe, will establish itself as the only viable singulation method guaranteed to give the highest quality die. Within other markets, the quality aspect may become more of a value proposition for the device manufacturers to offer their customers. So here we may see a trend for thicker larger die to realise these benefits and perhaps an opportunity for the margins of these higher quality die to go up over time.
Richard Barnett, Etch Product Manager, SPTS Technologies (an Orbotech company)
Richard Barnett has 20 years’ experience in the semiconductor and electronics manufacturing industries. Prior to his current role, Richard worked in product management and as a process engineer at both Aviza and Surface Technology Systems (STS), prior to their merger to form SPTS. Earlier in his career Richard worked at Pure Wafer plc, Luca Aerospace and European Semiconductor Manufacturing, and began his career with LG Semiconductor as a member of their first overseas fab engineering team in the diffusion/wet-etch process group. Richard holds a Bachelor’s degree in Engineering for Material Engineering and Electronics from the University of Nottingham, has published technical articles related to silicon DRIE, and has delivered multiple presentations on wafer processing technologies.
Strong demand for thinner wafers and smaller die is driving the evolution of dicing technologies.
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