Table of contents 2

Scope of report 4

Three page summary 11

Executive summary 15

Context 73

Market forecasts 102

• Fan-Out packaging market revenue
• Fan-Out packaging market units

Market shares 120

• What’s new?
• Market shares of manufacturers
• Market shares of IC substrate vs Fan-Out technologies
• Market shares of various business models

Supply chain 144

• What’s new?
• Supply chain overview
• Global mapping
• Fan-Out key supplier activity summary
• Analysis of the latest developments in the supply chain
• Apple and TSMC’s contract expires by 2021: what to expect?
• Deca’s new business model
• Nepes’s new Fan-Out packaging spin-off company: Nepes Laweh
• Introduction of new players in Fan-Out packaging

Market trends 187

• Market drivers
• Mobile AiP is trending with 5G
• Big die packaging is trending with HPC
• Fan-Out packaging in automotive radar
• Fan-Out packaging drivers

Commercialization status 240

• What’s New?
• Overview
• Commercialization window by IO count and package size
• Smartphones: PMIC
• Smartphones: Audio Codec
• Automotive Radar
• Smartphones: APE
• Mobile: AiP
• Smartwatches
• HPC

Technology trends 290

• What’s new?
• Fan-Out packaging technology roadmaps
• Fan-Out packaging technology by manufacturer
• Fan-Out packaging technical challenges
• Perspective on technology

Fan-Out Panel Level Packaging 367

• Panel trends and motivation
• FOPLP supply chain
• Reality of panel penetration

Report conclusion 393

Appendix 395

Yole Développement presentation 414

NEW MARKET CLASS DEFINED: UHD FO

Fan-Out (FO) packaging is penetrating into even higher-end input/output (I/O) densities, much greater than 18 per mm2, and finer redistribution layers (RDL), with length to side (L/S) measurements far below 5μm/5μm. Along with the proliferation of new technologies and new commercialized products, industry players are having difficulty segmenting the market. Consequently, in the 2020 report, Yole Développement (Yole) has clearly defined FO packaging market classes into Ultra High Density (UHD) FO, High Density (HD) FO and Core FO. This will allow readers to understand and make informed decisions on strategies to gain a competitive advantage within individual market class. This helps industry players understand what capabilities each segment is looking for or offering. Depending on how industry players would like to position themselves in the marketplace, any technology strategy must embrace a combination of options and approaches targeted to demand needs.

In 2019, TSMC, the leading foundry with premium packaging capability, has been running production of its inFO_oS process with a N16 network System-on-Chip (SoC) processed at L/S below 2μm/2μm with a 1.5X reticle, speculated to be for MediaTek. Production for inFO_oS started its ramp in 2018. TSMC is diversifying its portfolio towards advanced packaging, a strategy that benefits from being one company with few business models. For example, TSMC is creating value with two distinctive businesses. It generates front-end (FE) dies and kills FE competitors by bundling the dies with advanced packaging. Within the packaging world, TSMC is a premium Outsourced Semiconductor Assembly and Test (OSAT) company. But its FE foundry is even more impressive for leading advanced node scaling against cutting-edge competitors like Samsung and Intel. Although TSMC’s FE foundry previously did not operate like an OSAT it may have to do so partially for UHD FO because it no longer produces memory. Hence, TSMC is now beginning to operate simultaneously as an OSAT when required to maximize the benefits of its foundry FE business.

New high performance computing (HPC) products will emerge and more UHD FO will be needed for as a cost-effective high-end package as compared to 2.5D interposers. Samsung Electronics is the leading integrated device manufacturer (IDM). PTI is the leading Fan-Out Panel Level Packaging (FOPLP) OSAT, specializing in memory packaging. JCET China is the leading OSAT in China. All three are known to have started qualifying UHD FO with various customers, and it is within their roadmaps. Samsung Electronics has been developing FOWLP with LS of 2μm/2μm for this business. PTI is targeting large die packaging at finer LS with FOPLP. Also, JCET is the midst of qualifying for Huawei in 2020. Overall, these FO packaging players are all leading specialists in their own fields and/or regions.

HD FO REMAINS A BATTLE BETWEEN TSMC AND SAMSUNG

In 2018, Samsung Electro Mechanics (SEMCO)’s FOPLP process has made a positive impact on FO packaging market. Samsung’s adoption of HD FOPLP in its smartwatch was the key milestone. At the moment, HD FO is essentially driven by only Apple’s application processor engine (APE), made using TSMC’s inFO_PoP. On the other hand, we expect Samsung to commercialize HD FOPLP in its own luxury and high-end smartphones. Consequently, Samsung will create its own HD FO market share of 21% by 2025.

Samsung Electronics is stepping up to its game by strengthening the synergy between semiconductor manufacturing and packaging. A strong indication is the acquisition of SEMCO’s FOPLP technologies. This is an attempt to improve the yield and gain more technical breakthroughs for FE plus packaging solutions. Equally important, Samsung Electronics has the same model as TSMC now. It is able to provide an APE, FE plus packaging bundle solution for Apple. The expiry of Apple’s contract with TSMC is a very good chance to grab back market share. Although Samsung has adopted HD FO in its smartwatch with in-house FOPLP technology, it is understood that the cost is not as low as expected because of lower yields. Samsung has the resource and capability to achieve the desired cost in due time. The question is whether Samsung can achieve it in the shortest time possible and come up with an attractive solution by 2020, because qualification needs to start before 2021. Whether Samsung Electronics can elevate high volume manufacturing (HVM) capabilities to a cost effective scale like TSMC’s over a short term remains an open question. The catch up by Samsung Electronics has been impressive.

MORE TECHNOLOGIES IN CORE FO

Presently, embedded wafer level ball grid array (eWLB) still dominates Core FO, but M-series Fan-Out Wafer Level Packaging (FOWLP) is up and coming. In February 2020, Deca became an independent technology development and licensing company. Deca is now focused on enabling industry leaders with M-Series fan-out and Adaptive Patterning.

It is understood that ASE gained business from Qualcomm due to its licensing technology of M-series from Deca. Also, ASE has started to run production by in-house technology Fan-Out Chip on Substrate (FOCoS) for data center applications, which simply brings more limelight to FO packaging in the Core FO market.

In 2019, Nepes also acquired Deca’s FO manufacturing operations in the Philippines. And at the same time, it spun off an FO packaging subsidiary called Nepes Laweh. Also, ESWIN has been actively building its FOPLP fab and engaged customers within China low volume manufacturing, which is expected to start by 2021.

JCET China is very HiSilicon-oriented. In fact, it is noted that a HD FO line was built in China supporting HiSilicon’s HD FO request. HiSilicon is trying to enable domestic OSATs whenever possible due to the trade war with the US. This benefitted JCET.

JCET Singapore used to enjoy large volumes from Qualcomm. Although the volume is not as significant as before, JCET Singapore has started to attract many new customers for 5G-driven applications. JCET is enjoying good business from existing Core power management integrated circuits (PMICs) and qualifying for new application due to 5G boom starting from 2019.

AIP ADOPTION IN FAN-OUT PACKAGING

In 5G, the challenge is higher frequency operation. All of the packages have to be re-designed to optimize signal gains for higher frequencies. It is understood that one millimeter wavelength (mmWave) 5G iPhone will require three to four antenna-in-package (AiP) modules. Since FO packaging minimizes antenna signal loss in a thinner form factor. TSMC will provide at least one inFO_AiP product regardless of the format. Hence, FO packaging is desirable for AiP in higherend phones pursuing sleeker design. Presently, it is understood that Apple’s 5G iPhone will use a “phased array” antenna with two parts that work together to form a beam of radio signal. The beam can be electronically steered in different directions without the antenna moving. The modem chip and the antenna module work closely together to make this function properly. We do note that mmWave itself isn’t new. For example, cars make use of mmWave radar chips operating at 77GHz. These radar chips are used for lane detection and other safety features, which is essentially packaged by FO, typically for luxury cars. It is known that TSMC has been very active in this aspect and we are expecting inFO AiP to take off in Apple 5G iPhones in 2020 and in Apple 5G iPads in 2021.

3D-Plus, 3M, AGC, Amkor, Ajinomoto, AKG, Analog Devices, Apple, ASE, A*Star (IME), AT&S, Atotech, Aurora semiconductors, BASF, BK Ultrasound, Blackberry, Boschmann, Brewer Science, Broadcom, Bosch, China Mobile, Cirrus Logic, Cypress, Deca Technologies, Denso, Dialog Semiconductor, Dow Dupont, Evatec, Fitbit, Freescale (NXP), Fujifilm, Global Foundry, Google, Hella, HiSilicon, Hitachi chemicals, Huawei, Huatian, Infineon, Intel, Lenovo, LGE, Marvell, Maxim IC, Mediatek, Medtronic, Nagase ChemteX, Nanium (Amkor), Nepes, Nepes Laweh, Nephos, Nokia, NXP, Oppo, Onda, PTI, Qualcomm, Qorvo, Rena, Rohm, Samsung, Schmoll maschinen, SEMCO, SEMSYSCO, Shinko Electric, Sivers IMA, Spectrum, SPIL, STATS ChipPAC (JCET), STMicroelectronics, Synaptics, Synergy, TI, TSMC, Unimicron, Xiaomi and more…