The memory packaging market will grow to $20B in 2026. The ramp-up of Chinese memory, the growth of flip-chip DRAM, and the rise of 3D-stacking technologies are opening significant opportunities for packaging players.
Report available on November 15, 2021
- Analysis of the NAND and DRAM packaging business with a focus on 5 end markets: data center, mobile, automotive, PC, and consumer electronics
- 2020-2026 market forecast for 3D NAND technology manufactured using wafer-to-wafer hybrid bonding (e.g., YMTC’s XtackingTM) in units of wafers and packages
- 2020-2026 market forecast for the packaging of NOR Flash, SRAM, PCM, MRAM, RRAM, and other memory technologies
- Overview of advanced-packaging solutions for the integration of logic and memory
- Discussion on the opportunities of hybrid bonding for next-generation NAND, DRAM, and HBM technologies
- 2020-2026 market forecast in US$, wafers, and package units
- Technology description and main technological trends, along with an overview of the leading players and product-development roadmaps
- Key players by technology and application
- Supply chain challenges: impact of COVID-19 and shortages
- Competitive landscape and market dynamics with a focus on China
Objectives of the report:
- Present an overview of the stand-alone memory market
- Provide an understanding of memory packaging technologies and markets:
- Technical characteristics, advantages, limitations, and manufacturing methods for leadframe, wirebond, WLCSP, flip-chip, TSV-stacking, and XtackingTM 3D NAND.
- Market trends for the packaging of DRAM, NAND, NOR, emerging NVM, and other stand-alone memory technologies.
- Forecast for 2020-2026 memory-packaging market:
- Revenue (US$), package, and wafer volume (units), segmented by memory technology, end market, and package type.
- Describe the memory packaging business:
- Market drivers, challenges & opportunities, roadmaps, and players,
- Supply chain and players’ dynamics with a focus on OSATs and memory IDMs,
- Recent acquisitions, funding, partnerships, and latest company news.
TABLE OF CONTENT
Glossary and definitions 2
Report objectives 11
Scope of the report 12
Comparison with the 2017 report 16
Three-slide summary 20
Executive summary 24
Overview of the memory business 65
- Stand-alone memory technology and market
- Stand-alone memory market players
Overview of memory packaging 96
- Memory packaging Technology
- Memory packaging Players
Memory packaging trends by end markets 148
- Data center
- Personal computer (client)
Memory packaging forecast 193
- NAND packaging market forecast – in $M, units, and wafers
- DRAM packaging market forecast – in $M, units, and wafers
- Other stand-alone memory packaging forecast
- Supply chain mapping
- Supply chain challenges – focus on shortages
- M&A and partnerships
China’s memory business 254
Advanced packaging for memory-logic integration 276
Hybrid bonding – overview 295
Packaging materials – overview 311
General conclusions 321
Noteworthy news 325
Yole Presentation 332
DRIVEN BY ROBUST DRAM AND NAND DEMAND, THE MEMORY PACKAGING MARKET WILL CONTINUE GROWING FOR THE NEXT 5 YEARS. FLIP-CHIP WILL CONTINUE ITS EXPANSION IN SERVER/PC DRAM APPLICATIONS
Memory is a critical market in modern data-centric societies, fueled by important megatrends, such as mobility, cloud computing, Artificial Intelligence (AI), and the Internet of Things (IoT). All these are propelling the socalled “data-generation explosion” and are shaping a robust growth in memory demand for the next several years.
NAND and DRAM are the workhorse memory technologies and account together for ~96% of the overall stand-alone memory market revenue. By 2026, NAND and DRAM revenues are expected to grow with CAGR20-26 of ~9% (NAND) and ~15% (DRAM), respectively, to $93B and $155B.
The memory packaging market follows the same trends that rule the stand-alone memory market and thus will benefit from the robust long-term growth of memory demand, as well as from the ongoing fab capacity expansion. As a result, we predict that the overall volume of memory wafers will grow from ~35.5M in 2020 to ~50M in 2026 with a CAGR20-26~6%, while the volume of memory packages will rise with a CAGR20-26 of ~5% in the same years. The overall memory packaging market in 2020 is worth ~$13.1B, which corresponds to ~10% of the stand-alone memory market. In terms of packaging revenues, DRAM is the leading memory technology in 2020 with a 63% share, while wirebond is the dominant packaging approach being mainly used for mobile applications.
In the last five years, PC and server DRAM packaging has been progressively migrating from wirebond to flip-chip. Samsung and SK hynix have converted most of their DRAM packaging lines into flip-chip; Micron did not initiate the conversion process as early as its Korean competitors but has also been readying its own flip-chip packaging lines. The adoption of flipchip packaging with short interconnects will be essential to fully exploit the potential of DDR5 and subsequent DRAM generations.
WLCSP is being increasingly adopted for consumer/wearable applications requiring small form-factor. It is found in a variety of low-density memory devices, including NOR Flash, EEPROM, and SLC NAND. It is expected to grow in revenue at a CAGR20-26 ~14%, but in terms of value will remain only ~1% of the market by 2026.
ADVANCED PACKAGING SOLUTIONS ARE ESSENTIAL TO ADDRESS THE “MEMORY BOTTLENECK” PROBLEM. HYBRID BONDING WILL ENABLE THE NEXT GENERATION OF HIGH-PERFORMANCE COMPUTING ARCHITECTURES
With the ongoing slowdown of Moore’s Law and the rise of new advanced packaging techniques, back-end processing has gained more and more importance, and several semiconductor companies are now leveraging it – rather than the front-end – to improve the performance, the compactness, and the number of functionalities of their IC products. Heterogeneous integration techniques and chiplet architectures enabled by novel stacking/bonding solutions have become essential to increase the performance of computing systems via a tight integration of logic and memory building blocks.
Memory packaging technologies are also rapidly evolving to meet growing performance needs from data-intensive applications, currently hampered by the so-called “memory wall”, a bandwidth limitation associated with data transfer between memory and processing units. High-Bandwidth Memory (HBM) is being commercialized to respond to this challenge, leveraging 3D stacking of DRAM dies using Though Silicon Vias (TSVs) and thermo-compression bonding.
Nowadays, all memory manufacturers are carrying out R&D activities on hybrid bonding. YMTC was the first player to adopt hybrid bonding for NAND with its XtackingTM 3 D N AND t echnology. H owever, adopting a wafer-to-wafer stacking approach would require a massive conversion of production lines, which is not suitable for companies that already have large production capacity in place. Therefore, we expect that incumbent players will continue with their monolithic 3D NAND solutions until when the current deckstacking approach will run out of steam.
Hybrid bonding is widely being explored for nextgeneration HBM devices, and we believe it could make its first entry into the market before the next five years. However, significant technical challenges still need to be addressed to achieve high yields suitable for high-volume manufacturing.
THE RAMP-UP OF MEMORY MANUFACTURING BY CHINESE MEMORY SUPPLIERS (YMTC AND CXMT) IS OPENING A $1.1B BUSINESS OPPORTUNITY FOR OSATS BY 2026
Unlike the stand-alone memory market that is characterized by strong price volatility, the memory packaging market is more stable since most of the business is carried out internally by IDMs. We estimate that approximately 68% of the memory packaging revenue in 2020 was generated by IDM players and the remaining 32% by OSATs.
The rising memory IDMs in China, YMTC and CXMT, are rapidly ramping up their NAND and DRAM wafer production, respectively. These two players do not have well-established internal packaging capabilities and must outsource all their packaging to OSATs. This represents a unique business opportunity for OSATs, especially in China. We estimate that the revenue opportunity for OSATs stemming from the Chinese memory makers can grow from <$100M in 2020 to ~$1.1B in 2026 (CAGR20-26 ~55%). Chinese OSATs will be the first to take this opportunity, and the three major players in China (JCET, TongFu, and HT Tech) are readying to enter the race. Two opposing trends are affecting the memory packaging business: on the one hand, the ramping up of memory production in China is fueling the growth of revenues for OSATs; on the other hand, IDMs are increasing their internal back-end capacity – particularly for advanced-packaging processes – reducing the outsourcing to OSATs. In this context, the players’ dynamics and strategies need to be carefully analyzed…
Yole has combined its multi-decade expertise in semiconductor packaging and memory to deliver the 2021 edition of the “Memory Packaging” report, which analyzes in detail these challenges and opportunities in the memory packaging business.
Amkor, Applied Materials, Ardentec, ASE, ASML, Canon, Chipbond Technology, ChipMOS Technologies, CXMT, Dosilicon, ESMT, Everspin, Formosa Advanced Technologies, Fujitsu, GigaDevice, GlobalFoundries, Greatek Elec, Hana Micron, Hitachi, IBM, Infineon-Cypress, Intel, ISSI, JSSI, JCET Group, JHICC, King Yuan Electronics, Kingston, Kioxia, KLA Tencor, Lam Research, Lapis, LB Semicon, Lingsen Precision Industries, Liteon, Macronix, MediaTek, Micron, Montage, Nanya, Nepes Corporation, Nuvoton-Panasonic, OSE, Powerchip, Powertech Technology (PTI), Rambus, Samsung, SFA Semicon, SJ Semi, SK Hynix, Smart Modular, SMIC, Sony, STMicroelectronics, Swissbit, TEL, Texas Instruments, Tianshui Huatian Microelectronics, Tong Hsing, Tongfu Microelectronics, TSMC, UMC, Unisem Berhad, UTAC, Walton Advanced Engineering, Winbond, WLCSP, XMC, YMTC, and more.