Note from the publisher: The report will be available from June 7, 2017.
3D integration, a leading-edge technology supporting high-performance applications - from imaging to artificial intelligence, an entire ecosystem in motion
How are datacenters and AI driving 3D TSV and heterogeneous integration growth?
The semiconductor industry’s hopes and patience were rewarded a few years ago when 3D stacked devices entered the market via the “back door” – in other words, for gaming products. Since their introduction, TSVs have held designers’ attention. The main reason: the performance potential offered by this technology is unequalled by any other packaging platform today. If in the past high-performance was synonymous with limited volume and reserved for data analytics and defense applications, this is no longer the case. High-end applications like deep learning, datacenter networking, AR/VR, and autonomous driving are becoming real, thereby pushing the limits of other current packaging platforms. So much so that last year we saw datacenters receiving networking processing units and memory cubes packaged on an interposer.
Fueled by increasing bandwidth needs for moving data in cloud-computing and supercomputing applications, performance-driven markets have adopted 3D stacked technologies in a row. Imaging, as the first market adopter of 3D integration, is propelling the market with an increasing number of sensors in smartphones and tablets, including 3D imaging.
In the report, we provide a detailed analysis of the applications in order to get a calendar of the ones available on the market.
TSV-based products - business update and market forecasts
TSV-based products can be classified in three ranges: low, middle, and high-end. In this report, we see that middle and high-end product markets like CMOS image sensor, memory cube, and interposer are based on a via-middle process. In low-end products, we can also find TSV based on via-middle (i.e. in Apple’s fingerprint sensor), but for cost reasons the MEMS industry is using essentially a via-last process, which is cheaper than a via-middle process.
More than 600,000 TSV-based wafers will be processed in 2022 for high-end products, a rather limited volume that nevertheless generates high revenue because of high wafer value. HBM is becoming a standard for large bandwidth applications, even though there are only two manufacturers: Samsung and SK Hynix, both based in Korea.
In this report, we also highlight the production of 3D SoC to enable low-latency computing for consumer devices. Due to the growing number of imaging sensors in smartphones, and the growing needs in computing, the number of 12” equivalent wafers will increase at a CAGR of 20% over the next five years, going from 1.3M in 2016 to 4M in 2022. TSV’s penetration rate in low-end products will remain stable, with the main source of growth due to RF filters in smartphone front-end modules, which keep increasing in order to support the different frequency bands used in 5G mobile communications protocol.
How is the 3D integration ecosystem progressing? New players entering the game
Looking at high-end wafer volume in production (around 170,000 units of 12-inch wafers in 2017), one can ask why big players like TSMC, GlobalFoundries, and Samsung, all of which are used to trading in high-volume wafers, are present in the high-performance 3D TSV business. One reason is the number of issues attached to 3D integration for high-performance applications. Being present in datacenters and the high-performance computing business is key: first because this is a way for these companies to maintain their leading technology position, and second because giant web companies are looking to move their activity from service providers to IC designers and develop their own brand-labelled chips, leaving manufacturing to the foundries. In developing customized, home-designed dies, web companies grasp the business of chip sellers. Die design is key in machine-learning because of the need for custom solutions to enable and secure applications like connected things, voice recognition, and autonomous driving. In developing custom, in-house dies for inference, web companies are taking part of the chip sellers’ business, and are positioning to win the race towards autonomous driving, IoT, and AR/VR.
No semiconductor player is inclined to miss the next killer app, so they are adjusting their strategy accordingly. While web companies are positioning downstream in the supply chain to gain better control over outsourcing IC manufacturing and assembly, as well as gain higher shares in the value chain, “traditional” chip makers are moving upwards, like Nvidia, which launched a server product based on its GPU tesla P100 for deep-learning applications. Also, in 2016 Intel released several products – specifically, processors and accelerators aimed at High Performance Computing (HPC) and deep learning. One can ask which role will be left to midsized companies.
Our report provides a review of the different business models chosen by the companies to understand the future strategic evolution of the industry.
What technology challenges and competitive packaging will appear in the next five years?
Manufacturing yield is one remaining obstacle to full volume adoption of 3D TSV integration. HBM’s 2016 shortage was not helpful, and has encouraged companies to explore alternative solutions like SK Hynix’s GDDR6 memory, which can deliver similar bandwidth.
The $1,000 silicon interposer is still seen as an obstacle to higher volume adoption, which is why some chip makers are seeking alternative technologies. In this report we take a closer look at the EMbedded Interconnect Bridge package (EMIB) from Intel, as well as the Silicon-Less Integrated Module (SLIM) and Silicon-Less Interconnect Technology (SLIT) from SPIL, which can be found in Xilinx products as a replacement for silicon interposer. These technologies, often developed by OSATs, are arriving as challengers to 3D and 2.5D integration, but none are set up in volume production. If prices continue decreasing with volume adoption, and if the learning curve accelerates, 3D integration could become the standard advanced packaging platform for high-performance applications.
This report’s objectives are to:
- This report is split into two parts: one dedicated to high-performance products (high-end), the other to products requiring heterogeneous integration (low and middle-end): imaging, sensing, connecting, and lighting.
- Detailed analysis of markets requiring 3D and 2.5 integration (datacenters, high-performance computing, AR/VR, automotive, etc.)
- Focus on deep-learning applications and key players’ deep-learning strategies
- Updated list of commercial and future products
- Ecosystem and supply chain moves’ analysis, from design to end-customers
- Forecast of 3D system-on-chip-based products (wafer start, units, and revenue)
- Review of the different business models present in the current supply chain, along with updated player activity
Objectives of the Report
This report’s objectives are to:
- 3D and 2.5D IC packaging technology and market trends, by application
- Demonstration of how 3D integration is fueled by high-performance applications
- 2016 - 2022 forecast for high-performance, imaging, sensing, connecting, and lighting - by wafer start, units, and revenue in $
- Commercialization status of current and future 3D IC products
- Ecosystems, business models, and supply chain: key players’ strategic moves, and detailed activity by player
- Technology roadmap for TSV applications