Global challenges and technical hurdles are merely speed bumps for the charging DRAM business.
Despite the pandemic and trade-war tensions, the DRAM market has grown throughout the years 2020 (revenue up 7%) and 2021 (revenue up 41%). Constrained production and strong demand growth across most segments were the key ingredients for the prosperity of the DRAM business. DRAM remains the largest memory market segment by revenue: in 2021, it reached $94B and accounted for more than 56% of the total stand-alone memory market.
Amid semiconductor shortages and various global challenges, DRAM is expected to continue growing in 2022, with an annual growth rate of ~25%. And this is not all, as DRAM will continue expanding in the longer term and is poised to grow to over US$150B in 2027 with a CAGR during 2021-2027 of 9%. However, cyclicality will remain.
Yole Group’s analysts, Simone Bertolazzi from Yole Intelligence and Belinda Dube from Yole SystemPlus propose today, a snapshot of the memory industry, extracted from both reports: Status of the Memory Industry 2022 and LPDDR5 Memory Comparison 2022.
DRAM technology and business: a fierce competition among three major suppliers.
DRAM is a highly concentrated market with three main players – Samsung (Korea), SK hynix (Korea), and Micron (U.S.) – that together hold more than 93% of the overall market. Taiwanese companies (Nanya, Winbond, Powerchip) hold a combined market share of almost ~5%. The rising DRAM player from China –CXMT – has been selling DRAM products in 2021 targeting the domestic Chinese market for client PC and consumer applications.
Yole SystemPlus recently shed light on the competitive technology landscape through an extensive analysis of cutting-edge LPDDR5 memory. This comes with improved power management –vital to reduce battery drainage in smartphones – and improved performance and efficiency due to the small transistor process technology. LPDDR5 devices reach a speed of 6,400Mbps, almost 1.5 times faster than the previous generation of low-power DRAM memories. Usually paired with system-on-chip processors, the LPDDR5 package is mounted on the System-on-Chip (SoC) package to establish direct and rapid communication with the smartphone processor. SK hynix’s LPDDR5 8Gb dies are produced using the 1y technology node, as are Micron’s 12Gb dies, while Micron’s 16Gb dies are built using the 1Dz technology node.
Samsung manufactures its 16Gb dies using the 1Dz technology node resulting in improved die density compared to its competitors. DRAM cell size scaling is becoming complex with each node advancement; hence Samsung sets apart its manufacturing process by employing EUV lithography to shrink the DRAM cells while reducing the patterning steps. The LPDDR5 1Dz cell design used by Samsung is highly competitive compared to Micron’s and SK hynix’s LPDDR5 memory, as Samsung produces a memory cell that is relatively smaller than its competitors. Smaller DRAM cells produce denser memory dies that could result in reduced memory die size without a compromise in die capacity. Die shrinkage is important in improving productivity and is needed for high volume manufacturing to meet the demand for low power DRAM memory with a reduction of memory package footprint on smartphone boards. It is estimated that Samsung produces more than 2,000GB of 1Dz LPDDR5 per 300mm wafer. Samsung’s cutting-edge LPDDR5 process combines cell shrinkage and EUV lithography processes resulting in denser memories and reduced manufacturing steps, thus remaining cost competitive.
“The future of DRAM is DRAM”: new technical solutions will enable continuous bit-density scaling and performance improvement.
DRAM scalability was expected to end a few years ago, but new technical solutions have enabled the development of a 3rd 10nm-class generation (1z) and, potentially, even beyond. Overall, DRAM scaling is very challenging and is slowing compared to the past – both in terms of bit density (Gb/mm2) and cost-per-bit ($/Gb) – but it keeps moving forward! Despite rising technical challenges, DRAM will continue to be the workhorse memory technology, as new technological solutions – such as EUV lithography, hybrid bonding, and 3D DRAM – will enable continuous density scaling and performance growth.
Nowadays, there is a consensus that planar scaling – even through lithography EUV processes – will not be sufficient to provide the required bit-density improvement for the entire next decade. The industry urgently needs materials and architecture breakthroughs to enable further DRAM scaling to reduce cost, minimize power, and increase speed. Hence, monolithic 3D DRAM – the DRAM equivalent of 3D NAND – is already being considered by major equipment suppliers and by leading DRAM manufacturers as a potential solution for long-term scaling. Yole’s analysts believe that this novel 3D technology could make its entry into the market in the 2029–2030-time frame.
The processor-memory interface is also rapidly evolving to meet the demands of emerging data-intensive applications: memory sizes must increase, as must the bandwidth between memory and the CPU. A variety of interfaces and protocols are in the works, among which are HBM3 – which was recently released by JEDEC (January 2022) – and CXL, which has gained steam for adoption as a “far memory” interconnect. Novel processing-in-memory technologies were recently introduced into the market by major players (e.g., Samsung-Xilinx, SK hynix) to overcome the so-called “memory wall”.
Overall, a variety of different solutions are being explored by major companies within the DRAM memory ecosystem, and we are confident that technical challenges will not stop DRAM progress despite risks of slowing down due to the need for further innovation and investment.
About the authors
Simone Bertolazzi, PhD is a Senior Technology & Market analyst, Memory, at Yole Intelligence, part of Yole Group, working with the Semiconductor, Memory & Computing division. As member of the Yole’s memory team, he contributes on a day-to-day basis to the analysis of nonvolatile memory markets and technologies, their related materials and fabrication processes.
Previously, Simone carried out experimental research in the field of nanoscience and nanotechnology, focusing on emerging semiconducting materials and their opto-electronic device applications. He (co-) authored several papers in high-impact scientific journals and was awarded the prestigious Marie Curie Intra-European Fellowship.
Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland), where he developed novel flash memory cells based on heterostructures of two-dimensional materials and high-κ dielectrics. Simone earned a double M. A. Sc. degree from Polytechnique de Montréal (Canada) and Politecnico di Milano (Italy), graduating cum laude
Belinda Dube serves as a Technology & Cost Analyst at Yole SystemPlus, par ot Yole Group.
Belinda’s core expertise is memory technology, especially DRAM and 3D NAND flash memory. At the same time, she also investigates IC technologies as well as advanced packaging.
Belinda’s mission is to develop reverse engineering & costing reports. She also works on custom projects, where she works closely with the laboratory team to set up significant physical & chemical analyses of innovative memory chips. Based on the results, Belinda identifies and analyzes the overall manufacturing process and all technical choices made by the memory makers. The objectives of these analyses are to understand the structure of the device, identify all materials used, and point out the link between functionality and technology selected by the memory company.
In addition, a significant portion of her mission is dedicated to a strategic technology watch, where her aim is to identify innovative memory chips and manufacturing processes. Based on her expertise, Belinda updates internal simulation tools and runs custom training sessions and demos with industrials.
Belinda attends many international trade shows & conferences where she collects valuable information and meets leading memory players. She regularly has an opportunity to reveal pertinent results during key onsite presentations and webcasts.
Prior to System Plus Consulting, Belinda had the opportunity to work on several R&D projects dedicated to MEMS technologies and new substrates at INSA (Lyon, France).
Belinda holds a master’s degree in Instrumentation & Nanotechnology Engineering from INSA (France).
Despite global challenges, the market will grow over $260B in 2027. Memory demand will remain stubbornly resilient and new solutions will enable relentless technology scaling.
Mainstream low-power DRAM physical analysis, technology, and cost comparison: Samsung’s 1z generation, SK hynix’s 1y, and Micron’s 1y.
Quarterly analysis of the DRAM market, historical and forecast, including market pricing, supply data by producer, demand by end-market, plus much more.
Quarterly analysis of the NAND market, historical and forecast, including market pricing, supply data by producer, demand by end-market, plus much more.
LPDDR5: Low Power Dual Data Rate, 5th generation
HBM3: High Bandwidth Memory, 3rd generation
CXL: Compute Express Link
EUV: Extreme Ultra Violet