System in package: a way forward for system integration

An article written by  Favier Shoo and Santosh Kumar, Yole Développement, for Chip Scale Review –  With advanced node scaling over the past decades, the resulting semiconductors were expected to be more cost effective, dissipate less power, and have higher performance. Consequently, the semiconductor industry was focused mai nly on how to produce all the components that make up a system on a single chip, i.e., a system on chip (SoC) platform. In this megatrend-driven era, however, more devices are starting to rely on integrating separate components into a single system. Not all functions in a system need equivalent high-end performance, it is only by integrating components with the right value in the package that the cost can be lowered and optimal price points achieved. As a result, SoC has started to lose its appeal as a cost-efficient option for functional integration. Instead, system in package (SiP) opens a new door for a near boundless range of systems to be integrated into a package.

In the personal computer (PC) era of t he 1980s, mult i- ch ip modules (MCMs) (a similar concept to SiP at the module-level—SiP is also referred to as “vertical MCM” or “3D MCM”) were first developed by IBM to package processors for data centers and enterprise applications (Figure 1). Production was, however, expensive, with low volume and low yield and with a tailored supply chain that did not make it scalable.

SiP, as we know it today, emerged during the 2000s, driven by mobile applications’ functionality and miniaturization requirements. Volumes exploded because of the adoption of various SiPs (but mainly radio frequency [RF] applications) by mobile outsourced semiconductor assembly and test suppliers (OSATS), who emerged as key assemblers. The SiP business migrated from integrated device manufacturers (IDMs) to OSATS where the supply chain is relatively more mature than that used for MCMs. SiP integrates different chips and discrete components, as well as 3D chip stacking of either packaged chips or bare chips (i.e., wide-bandwidth memory cubes and memory on logic with throughsilicon vias [TSVs]) side-by-side on a common (either silicon, ceramic, or organic) substrate to form a system or subsystem for smartphones, tablets, highend networking servers, and computer applications. SiP technology encompasses both horizontal and vertical integration.

As noted above, SiPs are several integrated circuits enclosed in a singlechip carrier package. The SiP performs all, or most, of the functions of an electronic system and is typically used inside a mobile phone, digital music player, etc. Dies containing integrated circuits may be stacked vertically on a substrate. They are connected internally by fine wires bonded to the package. Alternatively, with flip-chip technology, solder bumps are used to join stacked chips together. SiPs are similar to SoCs, but less tightly integrated, and are not on a single semiconductor die… Full story

Source: http://www.chipscalereview.com/

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